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US 2023/0154801 A1Published application
Cmos top source/drain region doping and epitaxial growth for a vertical field effect transistor
AssigneeInternational Business Machines Corporation
InventorsHeng Wu, Ruilong Xie, Su Chen Fan, Jay William Strane, Hemanth Jagannathan
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Abstract
A method includes forming a p-type field effect transistor region and an n-type field effect transistor region into a semiconductor substrate. The method implements a process flow to fabricate highly doped top source/drains with minimal lithography and etching processes. The method permits the formation of VFETs with increased functionality and reduced scaling.
Claims20
A method, comprising:
- forming a p-type field effect transistor region including a p-type bottom source/drain and one or more first vertical fins and an n-type field effect transistor region including an n-type bottom source/drain and one or more second vertical fins, onto a semiconductor substrate;
- forming a top spacer on each of the one or more first vertical fins and the one or more second vertical fins;
- forming a p-type top source/drain on the one or more first vertical fins of the p-type field effect transistor region by:
- performing a first step of ion implanting of p-type dopants relative to exposed segments of the one or more first vertical fins;
- epitaxially growing one or more p-type source/drain layers on the top spacer and on the exposed segments of the one or more first vertical fins;
- and
- performing a second step of ion implanting of p-type dopants into the one or more p-type source/drain layers;
- and
- forming an n-type top source/drain on the one or more second vertical fins of the n-type field effect transistor region by:
- performing a first step of ion implanting of n-type dopants relative to exposed segments of the one or more second vertical fins;
- epitaxially growing one or more n-type source/drain layers on the top spacer and on the exposed segments of the one or more second vertical fins;
- and
- performing a second step of ion implanting of n-type dopants into the one or more n-type source/drain layers.
10 more elements
A method, comprising:
- forming a p-type field effect transistor region including a p-type bottom source/drain and a plurality of first vertical fins and an n-type field effect transistor region including an n-type bottom source/drain and a plurality of second vertical fins onto a semiconductor substrate;
- forming a top spacer on each of the first vertical fins and the second vertical fins;
- forming a p-type top source/drain on each of the first vertical fins by:
- performing a first step of ion implanting of p-type dopants relative to exposed segments of the first vertical fins;
- epitaxially growing a p-type source/drain layer on the top spacer on the exposed segments of the first vertical fins;
- and
- performing a second step of ion implanting of p-type dopants into the p-type source/drain layer;
- depositing a sacrificial fill material onto the top spacer of the second vertical fins;
- exposing the sacrificial fill material to the first and second steps of ion implanting of p-type dopants;
- removing the sacrificial fill material;
- and
- forming n-type top source/drains on exposed segments of the second vertical fins.
9 more elements
A method, comprising:
- forming a first-type field effect transistor region including a first-type bottom source/drain and a plurality of first vertical fins and a second-type field effect transistor region including a second-type bottom source/drain and a plurality of second vertical fins onto a semiconductor substrate;
- depositing a sacrificial fill material onto the first vertical fins and the second vertical fins;
- removing the sacrificial fill material from the first vertical fins to expose segments of the first vertical fins;
- forming a first-type top source/drain on each of the first vertical fins by:
- performing a first step of ion implanting of first-type dopants into the exposed segments of the first vertical fins;
- epitaxially growing a first-type source/drain layer on each of the exposed segments of the first vertical fins;
- and
- performing a second step of ion implanting of first-type dopants into the first-type source/drain layers to form the first-type top source/drains;
- covering the first-type field effect transistor region including the first-type source/drains with a mask layer;
- removing the sacrificial fill material from the second vertical fins to expose segments of the second vertical fins;
- and
- forming a second-type top source/drain on each of the second vertical fins.
9 more elements
Dependencies are inferred from the claim text.