Semiconductor memory devices, electronic systems including the same and fabricating methods of the same

A semiconductor memory device comprising:

• a cell substrate including a cell array region, a first extension region, a second extension region, a third extension region, and a through region;
• a first mold structure including a plurality of first gate electrodes sequentially stacked on the cell substrate and stacked on the third extension region in a stepwise manner;
• a first interlayer insulating layer extending conformally on the first gate electrodes on the third extension region;
• a second mold structure including a plurality of second gate electrodes sequentially stacked on the first interlayer insulating layer and stacked on the second extension region in the stepwise manner;
• a second interlayer insulating layer extending conformally on the second gate electrodes on the second extension region;
• a third mold structure including a plurality of third gate electrodes sequentially stacked on the second interlayer insulating layer and stacked on the first extension region in the stepwise manner;
• a third interlayer insulating layer extending conformally on the third gate electrodes on the first extension region;
• a channel structure in the first to third mold structures on the cell array region;
• a first cell contact structure in the first mold structure on the third extension region;
• a second cell contact structure in the first mold structure and the second mold structure on the second extension region;
• and
• a third cell contact structure in the first to third mold structures on the first extension region,
• wherein an impurity concentration of the first interlayer insulating layer is different from each of an impurity concentration of the second interlayer insulating layer and an impurity concentration of the third interlayer insulating layer.