Memory controller for controlling allocation ratio of buffer memory, memory system including the same, and method of operating memory controller
AssigneeSamsung Electronics Co., Ltd.
InventorsJongin Lee, Bokyoung Kim
Life of this patent
Estimating the term…
Abstract
A memory system includes a memory controller configured to control a memory device and sub-buffer memory arranged outside the memory controller. The memory controller includes a processor configured to control a memory operation for the memory device, main buffer memory that is different from the sub-buffer memory and arranged in the memory controller, and a buffer allocation circuit configured to control an allocation ratio between the sub-buffer memory and the main buffer memory. The processor sets an operation mode of the buffer allocation circuit as an operation in which the allocation ratio is fixed.
Claims20
A memory system comprising:
- a memory controller configured to control a memory device;
- and
- a sub-buffer memory arranged outside the memory controller,
- wherein the memory controller comprises:
- a processor configured to control a memory operation for the memory device;
- a main buffer memory that is different from the sub-buffer memory and arranged in the memory controller;
- and
- a buffer allocation circuit configured to control an allocation ratio between the sub-buffer memory and the main buffer memory,
- wherein the processor sets an operation mode of the buffer allocation circuit and the buffer allocation circuit controls the allocation ratio based on the operation mode.
A memory system comprising:
- a memory controller configured to control a memory device;
- and
- a sub-buffer memory arranged outside the memory controller,
- wherein the memory controller further comprises:
- a processor configured to control a memory operation for the memory device;
- a main buffer memory that is different from the sub-buffer memory and arranged in the memory controller;
- and
- a buffer allocation circuit configured to control an allocation ratio between the sub-buffer memory and the main buffer memory,
- wherein the processor sets the buffer allocation circuit to an operation mode in which the buffer allocation circuit variably sets the allocation ratio.
A method comprising:
- receiving a command from a host;
- determining an operation mode of a buffer allocation circuit in a memory controller as one of a first operation mode and a second operation mode;
- when the buffer allocation circuit is in the first operation mode, setting an allocation ratio between a main buffer memory arranged in the memory controller and a sub-buffer memory arranged outside the memory controller to a predefined ratio;
- and
- when the buffer allocation circuit is in the second operation mode, variably setting the allocation ratio based on a type of the command.
Dependencies are inferred from the claim text.