Three-dimensional ltcc package structure

A three-dimensional low-temperature co-fired ceramics (LTCC) package structure comprising:

• an interposer, multiple chip input/output (I/O) contacts being disposed on a central portion of at least one of an upper surface and a lower surface of the interposer, multiple chip signal pathway nodes being disposed on a peripheral portion thereof, and the chip I/O contacts being electrically connected to the chip signal pathway nodes through transmission wires embedded in the interposer;
• a pair of separator strips, provided with multiple signal junction wires therein, the signal junction wires penetrating through an upper surface and a lower surface of the separator strips, the separator strips being oppositely disposed on the lower surface of the interposer, and the signal junction wires being electrically connected to the chip signal pathway nodes of the interposer;
• a semiconductor chip, superposed on or under the interposer, and electrically connected to the chip I/O contacts;
• and
• a substrate, multiple signal junction nodes being disposed on a peripheral portion of an upper surface of the substrate, multiple signal output contacts being disposed on a bottom surface of the substrate, the signal junction nodes being electrically connected to the signal output contacts through transmission wires embedded in the substrate, the substrate being superposed under the separator strips, and the signal junction wires of the separator strips being electrically connected to the signal junction nodes of the substrate;
• wherein the interposer, the semiconductor chip, the separator strips and the substrate are assembled to form a lamination combination, and the semiconductor chip and the separator strips are covered by encapsulation adhesive and the substrate.