Transistor usage metering through bias temperature instability monitoring
AssigneeInternational Business Machines Corporation
InventorEffendi Leobandung
Life of this patent
Estimating the term…
Abstract
A circuit for monitoring usage of an active field effect transistor (FET) includes the active FET and a reference FET, formed in a same structure as the active FET. The active FET and the reference FET both are pFET or both are nFET, and are stacked on each other at a common gate. The circuit also includes a differential current sense circuit (DCSC) and a plurality of switches for connecting terminals of the FETs to logic voltage, ground voltage, and/or the DCSC. The DCSC is configured to measure and compare currents through each of the active and reference FETs when a threshold voltage is applied to the common gate.
Claims20
An electronic circuit comprising:
- an active field effect transistor (FET) that includes an active source, an active drain, and a common gate;
- a reference FET, formed in a same semiconductor structure as the active FET, that includes a reference source, a reference drain, and the common gate, wherein the active FET and the reference FET both are nFET, and are stacked on each other at the common gate;
- a differential current sense circuit (DCSC);
- and
- a plurality of switches that selectively electrically connect the reference source of the reference FET to the DCSC or to logic voltage, and selectively electrically connect the active source of the active FET to the DCSC or to ground voltage;
- wherein the DCSC is configured to measure and compare currents through each of the active and reference FETs when a threshold voltage is applied to the common gate.
An electronic circuit comprising:
- an active field effect transistor (FET) that includes an active source, an active drain, and a common gate;
- a reference FET, formed in a same semiconductor structure as the active FET, that includes a reference source, a reference drain, and the common gate, wherein the active FET and the reference FET both are pFET, and are stacked on each other at the common gate;
- a differential current sense circuit (DCSC);
- and
- a plurality of switches that selectively electrically connect the reference source of the reference FET to the differential current sense circuit or to ground voltage, and selectively electrically connect the active source of the active FET to the differential current sense circuit or to logic voltage;
- wherein the DCSC is configured to measure and compare currents through each of the active and reference FETs when a threshold voltage is applied to the common gate and the active and reference sources are connected to the DCSC.
A semiconductor structure comprising:
- an active field effect transistor (FET) that includes an active source, an active drain, and a common gate;
- a reference FET, formed in a same semiconductor structure as the active FET, that includes a reference source, a reference drain, and the common gate, wherein the active FET and the reference FET both are pFET or both are nFET, and are stacked on each other at the common gate.
Dependencies are inferred from the claim text.