Semiconductor memory device and method for fabricating the same

A semiconductor memory device comprising:

• an insulating structure comprising a first surface and a second surface, which are opposite to each other;
• an active pattern on the first surface of the insulating structure;
• a first conductive line extending in a first direction on a side of the active pattern;
• a capacitor structure on the active pattern opposite the insulating structure;
• a second conductive line extending in a second direction intersecting the first direction in the insulating structure;
• a first semiconductor substrate comprising a first rear surface facing the second surface of the insulating structure and a first front surface opposite to the first rear surface;
• and
• a first circuit element on the first front surface of the first semiconductor substrate,
• wherein the active pattern extends in a vertical direction intersecting the first direction and the second direction to electrically connect the second conductive line to the capacitor structure.

A semiconductor memory device comprising:

• a base insulating layer comprising a first front surface and a first rear surface, which are opposite to each other;
• an active pattern on the first front surface of the base insulating layer;
• a first conductive line extending in a first direction on a side of the active pattern;
• a capacitor structure on the active pattern opposite the base insulating layer;
• a plurality of second conductive lines spaced apart from each other on the first rear surface of the base insulating layer and extending in parallel in a second direction intersecting the first direction;
• a bit line contact extending through the base insulating layer to electrically connect one of the second conductive lines to the active pattern;
• and
• a shielding line between two adjacent second conductive lines among the plurality of second conductive lines on the first rear surface of the base insulating layer,
• wherein the active pattern extends in a vertical direction intersecting the first direction and the second direction to electrically connect the bit line contact to the capacitor structure.