L-type wordline connection structure for three-dimensional memory
AssigneeApplied Materials, Inc.
InventorsChang Seok Kang, Gill Yong Lee, Fred Fishburn, Tomohiko Kitajima, Sung-Kwan Kang, Sony Varghese
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Abstract
A semiconductor manufacturing process for forming a three-dimensional (3D) memory structure and a semiconductor device having a 3D memory structure is described. The 3D memory structure comprises layers of memory cells with L shaped conductive layers where the L shaped conductive layers of each layer are coupled to metal lines disposed above the top or upper most layer such that the memory cells in each layer can be coupled to control circuitry.
Claims20
A three-dimensional (3D) memory device, comprising:
- a first layer comprising a first trench having a first width;
- a first plurality of unit pairs disposed inside the first trench;
- a second layer disposed over the first layer, the second layer comprising a second trench having a second width smaller than the first width;
- a second plurality of unit pairs disposed inside the second trench;
- and
- a memory array formed from the first plurality of unit pairs and the second plurality of unit pairs.
A method of fabricating a three-dimensional (3D) memory device, comprising:
- providing a substrate;
- forming a first trench in the substrate, the first trench having a first width;
- stacking a first plurality of unit pairs inside the first trench;
- disposing mold material on the substrate;
- forming a second trench in the mold material, the second trench having a second width smaller than the first width;
- stacking a second plurality of unit pairs inside the second trench;
- and
- forming a memory array from the first plurality of unit pairs and the second plurality of unit pairs.
Dependencies are inferred from the claim text.