US 2023/0146542 A1 · SEMICONDUCTOR MEMORY DEVICE, METHOD FOR FABRICATING THE SAME AND ELECTRONIC SYSTEM INCLUDING THE SAME

Abstract

A semiconductor memory device includes a cell substrate, a mold structure including a plurality of gate electrodes stacked on the cell substrate, the gate electrodes including a first ground selection line, a second ground selection line and a plurality of word lines, which are sequentially stacked, a channel structure that extends in a vertical direction that crosses an upper surface of the cell substrate and penetrates the mold structure, a partial isolation region that extends in a first direction that is parallel with the upper surface of the cell substrate and partially separates the mold structure, and a ground isolation structure that connects two partial isolation regions adjacent to each other in the first direction, extends in the vertical direction and penetrates the first ground selection line and the second ground selection line, wherein a width of the ground isolation structure increases with distance from the cell substrate.

Claims20

Dependent claims

A semiconductor memory device comprising:

a cell substrate;
a mold structure comprising a plurality of gate electrodes stacked on the cell substrate, the gate electrodes comprising a first ground selection line, a second ground selection line, and a plurality of word lines, which are sequentially stacked;
a channel structure that extends in a vertical direction, and penetrates the mold structure, the vertical direction crossing an upper surface of the cell substrate;
a partial isolation region that extends in a first direction that is parallel with the upper surface of the cell substrate and partially separates the mold structure;
and
a ground isolation structure that connects two partial isolation regions adjacent to each other in the first direction, extends in the vertical direction, and penetrates the first ground selection line and the second ground selection line,
wherein a width of the ground isolation structure increases with distance from the cell substrate.

4 more elements

An electronic system comprising:

a main board;
a semiconductor memory device on the main board;
and
a controller electrically connected with the semiconductor memory device on the main board,
wherein the semiconductor memory device includes:
a cell substrate;
a mold structure comprising a plurality of gate electrodes stacked on the cell substrate and respectively connected with the controller;
a channel structure that extends in a vertical direction and penetrates the mold structure, the vertical direction crossing an upper surface of the cell substrate;
a partial isolation region that extends in a first direction and partially separate the mold structure;
and
a bit line that extends in a second direction that intersects the first direction, and connects the channel structure with the controller,
wherein the mold structure comprises a first cell block and a second cell block, which are separated from each other by the partial isolation region, and a bridge region that connects the first cell block with the second cell block,
wherein the gate electrodes comprise a first ground selection line, a second ground selection line, and a plurality of word lines, which are sequentially stacked,
wherein the first ground selection line comprises a first cutting opening formed as the bridge region of the first ground selection line was removed, and
wherein the second ground selection line comprises a second cutting opening formed as the bridge region of the second ground selection line was removed, and
wherein a size of the second cutting opening is greater than a size of the first cutting opening.

13 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device, method for fabricating the same and electronic system including the same

Life of this patent

Semiconductor memory device, method for fabricating the same and electronic system including the same

Life of this patent

Abstract

Claims20