Managing memory in an electronic system
AssigneeTeradyne, Inc.
InventorsScott D. Schaber, Howard Lin
Life of this patent
Estimating the term…
Abstract
An example system includes first memory, second memory having a greater areal density than the first memory, and a logic circuit configured to move some test data from the second memory to the first memory while at least one of (i) reading other test data from the first memory or (ii) processing the other test data. The logic circuit is configured to process the other test data prior to output along a test channel. The test channel leads to a device under test (DUT) to be tested.
Claims23
A system comprising:
- first memory;
- second memory having a greater areal density than the first memory;
- and
- a logic circuit configured to move some test data from the second memory to the first memory while at least one of (i) reading other test data from the first memory or (ii) processing the other test data, the logic circuit being configured to process the other test data prior to output along a test channel, where the test channel leads to a device under test (DUT) to be tested.
A system comprising:
- first memory;
- second memory having a greater areal density than the first memory;
- and
- a logic circuit configured to perform operations comprising:
- reading first data from the second memory;
- storing the first data in the first memory;
- reading the first data from the first memory;
- processing the first data prior to output to a test channel, where the test channel leads to a device under test (DUT) to be tested;
- and while the first data is being read from the first memory or being processed:
- reading second data from the second memory;
- and
- storing the second data in available first memory;
- wherein the first data and the second data comprise test data.
One or more non-transitory machine-readable media storing instructions that are executable by one or more processing devices to perform operations in a system that comprises first memory and second memory having a greater areal density than the first memory, the operations comprising:
- reading first data from the second memory;
- storing the first data in the first memory;
- reading the first data from the first memory;
- processing the first data prior to output to a test channel, where the test channel leads to a device under test (DUT) to be tested;
- and
- while the first data is being read from the first memory or being processed:
- reading second data from the second memory;
- and
- storing the second data in available first memory;
- wherein the first data and the second data comprise test data.
Dependencies are inferred from the claim text.