Integrated circuit device

An integrated circuit device comprising:

• a plurality of gate structures embedded in a substrate;
• a direct contact on the substrate between the plurality of gate structures;
• and
• a bit line electrode layer on the direct contact,
• wherein the bit line electrode layer is a superlattice alloy including a plurality of molybdenum (Mo) layers and a plurality of tungsten (W) layers alternately disposed,
• wherein the superlattice alloy includes Mo in a range from about 25 at % to about 75 at %.

An integrated circuit device comprising:

• a plurality of gate structures embedded in a substrate;
• a direct contact on the substrate and vertically aligned with the substrate between the plurality of gate structures;
• and
• a bit line structure on the direct contact, wherein
• the bit line structure includes a bit line barrier layer, a bit line electrode layer, and a bit line capping layer, and
• each of the plurality of gate structures includes a gate trench in the substrate, a gate insulating layer conformally on an inner wall of the gate trench, a gate electrode pattern on the gate insulating layer and filling a lower region of the gate trench, and a gate capping layer on the gate insulating layer and filling an upper region of the gate trench,
• wherein the bit line electrode layer has a thickness of about 10 nm to about 30 nm, and the bit line electrode layer includes a molybdenum tungsten (MoW) alloy including molybdenum (Mo) in a range of about 25 at % to about 75 at %.