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US 2023/0146366 A1Published application
Semiconductor structure and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Wei SU, Fu-Ting YEN, Ting-Ting CHEN, Teng-Chun TSAI
Life of this patent
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Abstract
A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.
Claims20
A device, comprising:
- a substrate;
- a gate structure over the substrate;
- gate spacers on opposite sidewalls of the gate structure;
- source/drain structures over the substrate and on opposite sides of the gate structure;
- and
- a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacers and in contact with a top surface of the gate structure.
3 more elements
A device, comprising:
- a substrate;
- a gate structure over the substrate;
- gate spacers on opposite sidewalls of the gate structure;
- source/drain structures over the substrate and on opposite sides of the gate structure;
- and
- a conductive layer in contact with a top surface of the gate structure and laterally separated from the gate spacers.
3 more elements
A device, comprising:
- a substrate;
- a gate structure over the substrate;
- gate spacers on opposite sidewalls of the gate structure;
- source/drain structures over the substrate and on opposite sides of the gate structure;
- and
- a self-assemble monolayer (SAM) over the gate structure and laterally between the gate spacers, wherein a top surface of the gate structure is partially covered by the SAM.
3 more elements
Dependencies are inferred from the claim text.