Method for driving display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHajime KIMURA, Atsushi UMEZAKI
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Abstract
To suppress degradation of a transistor. A method for driving a liquid crystal display device has a first period and a second period. In the first period, a first transistor and a second transistor are alternately turned on and off repeatedly, and a third transistor and a fourth transistor are turned off. In the second period, the first transistor and the second transistor are turned off, and the third transistor and the fourth transistor are alternately turned on and off repeatedly. Accordingly, the time during which the transistor is on can be reduced, so that degradation of characteristics of the transistor can be suppressed.
Claims4
(canceled)
A semiconductor device comprising:
- a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, and a circuit including a first transistor and a second transistor,
- wherein the first conductive layer includes a first opening, the second conductive layer includes a second opening, the third conductive layer includes a third opening, the fourth conductive layer includes a fourth opening, the fifth conductive layer includes a fifth opening, the sixth conductive layer includes a sixth opening,
- wherein each of the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, the fifth conductive layer and the sixth conductive layer includes a region extending in a first direction,
- wherein the seventh conductive layer includes a region extending in a direction crossing the first direction,
- wherein the seventh conductive layer is in contact with the first conductive layer,
- wherein the seventh conductive layer includes a region overlapping with the second to sixth openings,
- wherein one of a source and a drain of the first transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the first transistor is electrically connected to a scan line,
- wherein one of a source and a drain of the second transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the second transistor is electrically connected to an output signal line, and
- wherein a gate of the second transistor is electrically connected to a gate of the first transistor.
A semiconductor device comprising:
- a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, and a circuit including a first transistor and a second transistor,
- wherein the first conductive layer includes a first opening, the second conductive layer includes a second opening, the third conductive layer includes a third opening, the fourth conductive layer includes a fourth opening, the fifth conductive layer includes a fifth opening, the sixth conductive layer includes a sixth opening,
- wherein each of the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, the fifth conductive layer and the sixth conductive layer includes a region extending in a first direction,
- wherein the seventh conductive layer includes a region extending in a direction crossing the first direction,
- wherein the seventh conductive layer is in contact with the first conductive layer,
- wherein the seventh conductive layer includes a region overlapping with the second to sixth openings,
- wherein one of a source and a drain of the first transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the first transistor is electrically connected to a scan line,
- wherein one of a source and a drain of the second transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the second transistor is electrically connected to an output signal line,
- wherein a gate of the second transistor is electrically connected to a gate of the first transistor, and
- wherein a channel width of the second transistor is smaller than a channel width of the first transistor.
A semiconductor device comprising:
- a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, and a circuit including a first transistor and a second transistor,
- wherein the first conductive layer includes a first opening, the second conductive layer includes a second opening, the third conductive layer includes a third opening, the fourth conductive layer includes a fourth opening, the fifth conductive layer includes a fifth opening, the sixth conductive layer includes a sixth opening,
- wherein each of the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, the fifth conductive layer and the sixth conductive layer includes a region extending in a first direction,
- wherein the first conductive layer is located next to the second conductive layer in a plan view,
- wherein the seventh conductive layer includes a region extending in a direction crossing the first direction,
- wherein the seventh conductive layer is in contact with the first conductive layer,
- wherein the seventh conductive layer includes a region overlapping with the second to sixth openings,
- wherein one of a source and a drain of the first transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the first transistor is electrically connected to a scan line,
- wherein one of a source and a drain of the second transistor is electrically connected to the seventh conductive layer,
- wherein the other of the source and the drain of the second transistor is electrically connected to an output signal line, and
- wherein a gate of the second transistor is electrically connected to a gate of the first transistor.
Dependencies are inferred from the claim text.