Hybrid Nanostructure and Fin Structure Device

A device comprising:

• a stack of first semiconductor material layers disposed directly over a first portion of a semiconductor substrate, wherein the first semiconductor material layers are separated from each other within the stack of first semiconductor material layers, wherein the first portion of the semiconductor substrate extends to a first height;
• a first gate dielectric layer wrapping around each of the first semiconductor material layers within the stack of first semiconductor material layers;
• a fin structure extending from and physically contacting a second potion of the semiconductor substrate, the fin structure having a different material composition than the stack of first semiconductor material layers, the second portion of the semiconductor substrate extending to a second height that is less than the first height;
• and
• a second gate dielectric layer disposed on the fin structure;
• and
• a gate structure extending continuously over the stack of first semiconductor material layers and the fin structure.

A method comprising:

• forming a stack of semiconductor layers on a substrate, the stack of semiconductor layers including alternating layers of a first type of semiconductor material and a second type of semiconductor material;
• forming a trench through the stack of semiconductor layers;
• forming the second type of semiconductor material in the trench;
• patterning the stack of semiconductor layers to form a nanostructure stack and patterning the second type of semiconductor material within the trench to form a fin structure;
• forming a first gate structure over both the nanostructure stack and the fin structure, wherein the first gate structure includes a first conductive material layer;
• removing the first conductive material layer from over both the nanostructure stack and the fin structure;
• after removing the first conductive material layer, removing the second type of semiconductor material from the nanostructure stack;
• and
• after removing the second type of semiconductor material from the nanostructure stack, forming a second gate structure around each layer of the first type of semiconductor material from the nanostructure stack and on the fin structure, wherein the second gate structure includes a second conductive material layer disposed around each layer of the first type of semiconductor material from the nanostructure stack and on the fin structure.