Systems and methods for detecting intra-chip communication errors in a reconfigurable hardware system

A reconfigurable hardware system comprising:

• processing chip including a plurality of logic blocks for executing a first application and a second application;
• a communications link for providing communication between the plurality of logic blocks,
• wherein, the processing chip is configured to:
• generate a token;
• apply the token to a request at a source, and generate a first result;
• transmit the request with the first result to a destination over an address channel of the communications link;
• determine, at the destination, whether an error associated with the request has occurred, wherein in determining whether the error has occurred, the processing chip is further configured to:
• receive a received request corresponding to the request over the address channel;
• receive the first result with the received request;
• apply the token to the received request and generate a second result;
• compare the first result with the second result;
• and
• transmit a signal in response to the compare.