Semiconductor structure with isolation feature and method for manufacturing the same

A semiconductor structure, comprising:

• a first base fin structure protruding from a substrate;
• a first bottom isolation feature formed over the first base fin structure;
• a first bottom semiconductor layer formed over a first region of the first bottom isolation feature;
• first nanostructures formed over the first bottom semiconductor layer;
• a first gate structure wrapping around the first nanostructures;
• and
• a first source/drain structure attached to the first nanostructures and over a second region of the first bottom isolation feature,
• wherein a bottom portion of the second region of the first bottom isolation feature is lower than a bottom portion of the first region of first bottom isolation feature.

A method for manufacturing a semiconductor structure, comprising:

• forming a dummy bottom layer over a substrate;
• forming a bottom semiconductor layer over the dummy bottom layer;
• alternately stacking first semiconductor material layers and second semiconductor material layers to form a semiconductor material stack over the bottom semiconductor layer;
• patterning the semiconductor material stack, the bottom semiconductor layer, and the dummy bottom layer to form a first fin structure;
• recessing the first fin structure to form a first source/drain recess;
• etching the first semiconductor material layers of the first fin structure to form first notches and etching the dummy bottom layer of the first fin structure to form a first gap under the bottom semiconductor layer of the first fin structure;
• forming first inner spacers in the first notches and a first bottom isolation feature in the first gap and in a bottom portion of the first source/drain recess;
• and
• forming a first source/drain structure over the first bottom isolation feature in the first source/drain recess.