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US 2023/0143986 A1Published application
Transistor structure
AssigneeInvention And Collaboration Laboratory Pte. Ltd.
InventorChao-Chun Lu
Life of this patent
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Abstract
A transistor structure includes a substrate, an isolation wall, and a gate region. The substrate has a fin structure. The isolation wall clamps sidewalls of the fin structure. The gate region is above the fin structure and the isolation wall. The isolation wall is configured to prevent the fin structure from collapsing.
Claims23
A transistor structure comprising:
- a substrate with a fin structure;
- an isolation wall clamping sidewalls of the fin structure;
- and
- a gate region above the fin structure and the isolation wall;
- wherein the isolation wall is configured to prevent the fin structure from collapsing.
2 more elements
A transistor structure comprising:
- a substrate with a fin structure;
- a gate region above the fin structure;
- and
- a first conductive region abutting against the fin structure;
- wherein at least two sides of the first conductive region contact to a metal region.
2 more elements
A transistor structure comprising:
- a substrate with a fin structure;
- a gate region above the fin structure;
- and
- a first conductive region abutting against the fin structure;
- wherein a bottom of the gate region is lower than a bottom of the first conductive region.
2 more elements
Dependencies are inferred from the claim text.