Bottom contact for stacked gaa fet
AssigneeInternational Business Machines Corporation
InventorsIndira Seshadri, Stuart Sieg, Su Chen Fan
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsIndira Seshadri, Stuart Sieg, Su Chen Fan
Estimating the term…
A method is presented for constructing a semiconductor device. The method includes forming a plurality of fins over a nanosheet stack and a substrate, forming spacers between the nanosheet stack and one or more of the plurality of fins, each spacer defining a different shape, forming gate spacers adjacent the plurality of fins, the gate spacers directly contacting the one or more of the plurality of fins having a spacer, forming a barrier spacer between a set of fins of the plurality of fins, the barrier spacer directly contacting a top surface of a shallow trench isolation (STI) region, forming n-type epitaxial regions between the plurality of fins, forming p-type epitaxy regions over the n-type epitaxial regions, and forming a first contact extending vertically through the semiconductor device adjacent the barrier spacer and extending laterally away from the barrier spacer to directly contact a sidewall of an n-type epitaxial region.
A method for constructing a semiconductor device, the method comprising:
A method for constructing a stacked gate-all-around field effect transistor (GAA FET), the method comprising:
A stacked gate-all-around field effect transistor (GAA FET) comprising:
Dependencies are inferred from the claim text.