# US 2023/0143365 A1 · Memory device and method for calibrating the device and fabricating the device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0143365 A1 - Document ID: US20230143365A1 - Status: Published application - Kind: A1 - Application number: 17/852,664 - Filed: 2022-06-29 - Published: 2023-05-11 - Earliest claimed: 2021-11-05 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Joo Hwan KIM; Jun Young PARK; Jin Do BYUN; Kwang Seob SHIN; Eun Seok SHIN; Hyun-Yoon CHO; Young Don CHOI; Jung Hwan CHOI - Web page: https://patentgrep.com/patent/US20230143365A1 ## CPC - G11C 7/1048: {Data bus control circuits, e.g. precharging, presetting, equalising} - G11C 7/1057: {Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load} - G11C 11/4093: Input/output [I/O] data interface arrangements, e.g. data buffers - G11C 29/022: {in I/O circuitry} - G11C 29/028: {with adaption or trimming of parameters} - G11C 29/50008: {of impedance} - G11C 7/1084: {Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load} - G11C 2029/5002: {Characteristic} - G11C 2207/2254: Calibration - H03K 19/0005: {Modifications of input or output impedance} - G11C: STATIC STORES (semiconductor memory devices H10B) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A method includes measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit. ## Claims ### Claim 1 A method for calibrating a memory device, comprising: measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code to obtain a measurement result, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code; and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit. ### Claim 2 (depends on 1) The method of claim 1, wherein the measuring the linearity comprises: measuring a plurality of resistance values of the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit while applying a plurality of voltage levels to the transmission driver. ### Claim 3 (depends on 2) The method of claim 2, wherein the plurality of resistance values includes a first resistance value of the first pull-up circuit measured while applying the plurality of voltage levels to the transmission driver; and the measuring the linearity comprises: determining that the first pull-up circuit is linear in response to the first resistance value being within an error range; and determining that the first pull-up circuit is non-linear in response to the first resistance value being outside of the error range. ### Claim 4 (depends on 1) The method of claim 1, wherein the determining the calibration setting indicator comprises determining a test mode register set (TMRS) value. ### Claim 5 (depends on 4) The method of claim 4, further comprising: performing fusing based on the TMRS value. ### Claim 6 (depends on 1) The method of claim 1, wherein the calibration method is a ZQ calibration method. ### Claim 7 (depends on 1) The method of claim 1, further comprising: determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit based on the calibration setting indicator; and determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit based on the calibration setting indicator. ### Claim 8 (depends on 7) The method of claim 7, wherein the determining the respective pull-up code includes determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit to be set to the initial pull-up code in response to the calibration setting indicator having a first value; and the determining the respective pull-down code includes determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit to be set to the initial pull-down code in response to the calibration setting indicator having the first value. ### Claim 9 (depends on 8) The method of claim 8, wherein the determining the respective pull-up code includes determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit by executing a plurality of first search loops in response to the calibration setting indicator having a second value; and the determining the respective pull-down code includes determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit to be set to the initial pull-down code in response to the calibration setting indicator having the second value. ### Claim 10 (depends on 9) The method of claim 9, wherein the determining the respective pull-up code includes determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit to be set to the initial pull-up code in response to the calibration setting indicator having a third value; and the determining the respective pull-down code includes determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit by executing a plurality of second search loops in response to the calibration setting indicator having the third value. ### Claim 11 (depends on 10) The method of claim 10, wherein the determining the respective pull-up code includes determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit by executing the plurality of first search loops in response to the calibration setting indicator having a fourth value; and the determining the respective pull-down code includes determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit by executing the plurality of second search loops in response to the calibration setting indicator having the fourth value. ### Claim 12 A method for fabricating a memory device, comprising: measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit to obtain a measurement result, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code; determining a calibration method of a transmission driver based on the measurement result, the transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit; determining the respective pull-up code of each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit based on the calibration method; and determining the respective pull-down code of each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit based on the calibration method. ### Claim 13 (depends on 12) The method of claim 12, wherein the transmission driver is included in a memory chip; and the memory chip is on a wafer during the measuring the linearity. ### Claim 14 (depends on 13) The method of claim 13, wherein the determining the respective pull-up code and the determining the respective pull-down code are performed in a process of packaging the memory chip. ### Claim 15 (depends on 12) The method of claim 12, wherein the measuring the linearity comprises measuring the linearity of the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit using an initial pull-up code and an initial pull-down code; and the determining the respective pull-up code and the determining the respective pull-down code are performed using the initial pull-up code and the initial pull-down code. ### Claim 16 (depends on 12) The method of claim 12, wherein the measuring the linearity comprises: measuring a plurality of resistance values of the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit while applying a plurality of voltage levels to the transmission driver. ### Claim 17 A memory device comprising: a transmission driver configured to output a multi-level signal; and a memory storing a calibration setting indicator, wherein the transmission driver comprises: a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, wherein the calibration setting indicator indicates a method of setting the respective pull-up code and the respective pull-down code. ### Claim 18 (depends on 17) The memory device of claim 17, wherein the calibration setting indicator indicates a ZQ calibration method of the transmission driver. ### Claim 19 (depends on 17) The memory device of claim 17, wherein the calibration setting indicator stores information as a test mode register set (TMRS). ### Claim 20 (depends on 19) The memory device of claim 19, wherein the calibration setting indicator comprises a fused fuse.