Memory device having recessed active region
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYong-Sheng HUANG, Ming-Chyi LIU
Life of this patent
Estimating the term…
Abstract
A device includes an active region, a select gate, a control gate, a first metal alloy layer, and a second metal alloy layer. The active region has a source region and a drain region. The select gate is over the active region and between the source region and the drain region. The control gate is over the active region and between the source region and the select gate. The first metal alloy layer is in contact with the source region. The second metal alloy layer is in contact with the drain region and higher than a top surface of the control gate.
Claims20
A device comprising:
- an active region having a source region and a drain region;
- a select gate over the active region and between the source region and the drain region;
- a control gate over the active region and between the source region and the select gate;
- a first metal alloy layer in contact with the source region;
- and
- a second metal alloy layer in contact with the drain region and higher than a top surface of the control gate.
A device comprising:
- an active region;
- an isolation feature in contact with the active region;
- a control gate and a select gate over the active region and the isolation feature;
- and
- a first source/drain contact and a second source/drain contact connected to the active region and on opposite sides of the control gate and the select gate, wherein a bottommost surface of the first source/drain contact is lower than a topmost surface of the isolation feature.
A device comprising:
- an isolation feature;
- an active region embedded in the isolation feature and extending in a first direction in a top view;
- a control gate and a select gate extending in a second direction and across the isolation feature and the active region in the top view, wherein the second direction is different from the first direction;
- and
- an oxide-nitride-oxide (ONO) structure between the control gate and the select gate, wherein a topmost surface of the ONO structure is lower than a topmost surface of the isolation feature.
Dependencies are inferred from the claim text.