Protection of channel layer in three-terminal vertical memory structure

A method of forming an isolated channel layer:

• (i) etching one or more features through a mold stack, wherein the mold stack is disposed on a semiconductor substrate, the mold stack comprising a plurality of film stacks, wherein the plurality of film stacks is vertically stacked and adjacent film stacks are separated by a dielectric layer, each film stack comprising:
• a source region, a drain region, and an oxide layer between the source region and the drain region;
• (ii) selectively etching at least a portion of the oxide layer in each of the film stacks to form a recessed region in each of the film stacks;
• (iii) depositing a channel material conformally along sidewalls of the one or more features;
• (iv) depositing a sacrificial liner covering the channel material along the sidewalls of the one or more features;
• (v) etching the sacrificial liner covering the channel material in areas outside the recessed region;
• and
• (vi) selectively etching at least the channel material along the sidewalls of the one or more features outside the recessed region to define an isolated channel layer between the source region and the drain region of each film stack.