Method for Manufacturing High-Voltage Metal Gate Device

A method for manufacturing a high-voltage metal gate device, wherein the method for manufacturing the high-voltage metal gate device comprises the following steps:

• S1:
• after a pre-process, performing gate photolithography, etching, and sidewall processes to define at least one dummy poly gate, the at least one dummy poly gate is a dummy poly high-voltage gate, dummy polycrystalline of the dummy poly gate being formed on a gate dielectric layer;
• S2:
• filling isolation dielectric between the dummy poly gates and performing a chemical-mechanical polishing (CMP) process;
• S3:
• removing the dummy polycrystalline on the gate dielectric layer of the dummy poly gate through selective etching;
• S4:
• depositing a gate metal on a wafer;
• S5:
• performing a gate metal CMP process to reduce a thickness of the gate metal deposited on the wafer;
• S6:
• depositing a blocking dielectric layer on the gate metal;
• S7:
• opening a high-voltage gate region through photolithography, and removing blocking dielectric layer outside the high-voltage gate region through etching;
• S8:
• performing a gate metal CMP process to reduce the thickness of the gate metal deposited on the wafer, wherein due to a blocking effect of the blocking dielectric layer, the gate metal in the high-voltage gate region is higher than the gate metal outside the high-voltage gate region;
• and
• S9:
• removing the blocking dielectric layer on the gate metal in the high-voltage gate region through dry etching or acid pickling.