Superjunction semiconductor device and method for manufacturing same
AssigneeDB HiTek Co., Ltd.
InventorsJi Eun LEE, Kwang Young KO, Jong Min KIM
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Abstract
Disclosed is a superjunction semiconductor device and a method for manufacturing the same and, more particularly, to a superjunction semiconductor device and a method for manufacturing the same seeking to improve a switching speed and thus to improve switching characteristics by reducing a gate-to-drain parasitic capacitance (Cgd) and/or configuring a gate electrode as a floating dummy gate.
Claims20
A superjunction semiconductor device, comprising:
- a substrate;
- a drain electrode on the substrate;
- an epitaxial layer on the substrate;
- a plurality of pillar regions spaced apart from each other in the epitaxial layer;
- a gate electrode on the epitaxial layer;
- a dummy gate on the epitaxial layer;
- a body region in the epitaxial layer;
- and
- a source region in the body region,
- wherein the source region is adjacent to or under the gate electrode or a sidewall thereof, but is not adjacent to or under the dummy gate or a sidewall thereof.
A superjunction semiconductor device, comprising:
- a substrate;
- a drain electrode on the substrate;
- an epitaxial layer having a second conductivity type on the substrate;
- a plurality of pillar regions spaced apart from each other in a first direction in the epitaxial layer, and alternating with portions of the epitaxial layer along the first direction at a predetermined height or depth;
- a plurality of gate electrodes extending in a second direction on the epitaxial layer, and spaced apart from adjacent ones of the gate electrodes in the first direction;
- a plurality of dummy gates extending in the second direction on the epitaxial layer, and spaced apart from the adjacent ones of the gate electrodes and/or adjacent ones of the dummy gates in the first direction;
- a body region having a first conductivity type in the epitaxial layer and on one of the pillar regions;
- and
- a source region having the second conductivity type in the body region.
A method for manufacturing a superjunction semiconductor device, the method comprising:
- forming a plurality of epitaxial layers on a substrate;
- forming an implant layer including an impurity region having a first conductivity type in one or more of the epitaxial layers;
- forming a pillar region in the one or more epitaxial layers by diffusion;
- forming a gate electrode on or over the epitaxial layers;
- and
- forming a dummy gate on or over the epitaxial layers,
- wherein the gate electrode and the dummy gate extend in a direction substantially orthogonal to the pillar region.
A method for manufacturing a superjunction semiconductor device, the method comprising:
- forming an epitaxial layer on a substrate;
- forming a plurality of pillar regions spaced apart from each other in a first direction in the epitaxial layer;
- forming, in the epitaxial layer, a body region having a first body portion and a second body portion on one of the pillar regions;
- forming a source region in the first body region;
- forming a gate electrode on the epitaxial layer adjacent to and/or over the first body portion;
- and
- forming a dummy gate on the epitaxial layer adjacent to and/or over the second body portion.
Dependencies are inferred from the claim text.