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US 2023/0142399 A1Published application
Processor interrupt expansion feature
AssigneeIntel Corporation
InventorsGilbert Neiger, Rajesh Sankaran
Life of this patent
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Abstract
An embodiment of an integrated circuit may comprise a processor with one or more cores and circuitry coupled to the one or more cores, the circuitry to control one or more interrupts based on an interrupt expansion data structure, and report information derived from the interrupt expansion data structure to a software interrupt handler. Other embodiments are disclosed and claimed.
Claims21
An integrated circuit, comprising:
- a processor with one or more cores and circuitry coupled to the one or more cores, the circuitry to:
- control one or more interrupts based on an interrupt expansion data structure, and
- report information derived from the interrupt expansion data structure to a software interrupt handler.
A method, comprising:
- controlling one or more interrupts within a processor based on an interrupt expansion data structure;
- and
- reporting information derived from the interrupt expansion data structure from the processor to a software interrupt handler.
An apparatus, comprising:
- memory to store an interrupt expansion data structure;
- and
- a processor coupled to the memory, the processor including one or more cores and circuitry coupled to the one or more cores to:
- control one or more interrupts based on the interrupt expansion data structure, and
- report information derived from the interrupt expansion data structure to a software interrupt handler.
2 more elements
Dependencies are inferred from the claim text.