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US 2023/0141682 A1Published application
Memory controller, storage device, and operating method of storage device
AssigneeSamsung Electronics Co., Ltd.
InventorsSUNGJUNE YOUN, KYUNGMI SONG, HANJAE LEE
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Abstract
A storage device includes a non-volatile memory and a memory controller. The memory controller selects a selection memory block to store data in response to pattern data corresponding to a logical address associated with a write request, and provides to the non-volatile memory; a physical address of the selection memory block, as well as data and a write command associated with the write request.
Claims21
A storage device comprising:
- a non-volatile memory including a plurality of memory blocks;
- and
- a memory controller configured to
- receive a write request including a logical address from a host,
- receive data associated with the write request,
- select a selection memory block from among the plurality of memory blocks based on pattern data corresponding to the logical address, and
- provide the data, a write command associated with the write request, and a physical address corresponding to the selection memory block to the non-volatile memory,
- wherein the pattern data includes first counting information characterizing a first count related to a characteristic parameter value associated with the logical address falling within a first range, and second counting information characterizing a second count related to the characteristic parameter value falling within a second range different from the first range.
5 more elements
An operating method of a storage device, the operating method comprising:
- receiving a logical address and data from a host;
- determining pattern data corresponding to the logical address;
- selecting a selection memory block from among a plurality of memory blocks based on the pattern data;
- and
- storing the data in the selection memory block,
- wherein the pattern data includes first counting information characterizing a first count related to a characteristic parameter value associated with the logical address falling within a first range, and second counting information characterizing a second count related to the characteristic parameter value falling within a second range different from the first range.
3 more elements
A memory controller comprising:
- a buffer memory configure to store pattern data corresponding to a logical address;
- at least one counter configured to count time from an initial time;
- and
- a flash translation layer configured to
- obtain an access time by controlling the at least one counter to count time from the initial time to a time at which the logical address is accessed,
- update the pattern data based on the access time, and
- initialize the at least one counter to the initial time,
- wherein the pattern data includes first counting information characterizing a first count related to a characteristic parameter value associated with the logical address falling within a first range, and second counting information characterizing a second count related to the characteristic parameter value falling within a second range different from the first range.
5 more elements
21-24. (canceled)
Dependencies are inferred from the claim text.