# US 2023/0141503 A1 · Semiconductor apparatus having first and second bonding members, display apparatus, photoelectric conversion apparatus, electronic device, illumination apparatus, and moving body > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0141503 A1 - Document ID: US20230141503A1 - Status: Published application - Kind: A1 - Application number: 18/152,541 - Filed: 2023-01-10 - Published: 2023-05-11 - Earliest claimed: 2019-08-30 - Assignees: Canon Kabushiki Kaisha - Applicants: Canon Kabushiki Kaisha - Inventors: Hidemasa Oshige - Web page: https://patentgrep.com/patent/US20230141503A1 ## CPC - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT] - H10K 59/8722: {Peripheral sealing arrangements, e.g. adhesives, sealants} - H10K 59/40: OLEDs integrated with touch screens - H10K 59/873: {Encapsulations} - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A semiconductor apparatus includes an element substrate including an effective pixel region having a plurality of effective pixels on one principal surface side of a first substrate, and a peripheral region positioned around the effective pixel region, a second substrate, and a first and a second bonding member configured to bond the both substrates. The second bonding member includes a material different from that of the first bonding member. In a planar view with respect to the one principal surface, the second substrate is disposed within the element substrate. The first bonding member is provided between the peripheral region and the second substrate. The second bonding member is provided between the effective pixel region and the second substrate. In a planar view with respect to the one principal surface, at least a part of an end portion of the second substrate is positioned on the first bonding member. ## Claims ### Claim 1 A semiconductor apparatus comprising: an element substrate including an effective pixel region having a plurality of effective pixels on one principal surface of a first substrate, and a peripheral region positioned around the effective pixel region; a second substrate; and a first bonding member and a second bonding member configured to bond the element substrate and the second substrate, wherein the second bonding member contains a material different from a material of the first bonding member, wherein the first bonding member is disposed between the peripheral region and the second substrate, wherein the second bonding member is provided between the effective pixel region and the second substrate, and wherein, in a planar view with respect to the one principal surface, the element substrate has a polygonal shape, and wherein, in a planar view with respect to the one principal surface, the first bonding member includes two portions separated at a corner portion of the second substrate. ### Claim 2 (depends on 1) The semiconductor apparatus according to claim 1, wherein at least one of the first bonding member and the second bonding member is provided over a region having an area of ⅓ or more of an area of a region of the element substrate that does not overlap the second substrate, in a planar view with respect to the one principal surface. ### Claim 3 (depends on 1) The semiconductor apparatus according to claim 1, wherein an external connection terminal is disposed on the element substrate, wherein a structural member is disposed in a portion of the element substrate that does not overlap the second substrate in a planar view with respect to the one principal surface, and wherein the structural member is disposed between the second bonding member and the external connection terminal in a planar view with respect to the one principal surface. ### Claim 4 (depends on 3) The semiconductor apparatus according to claim 3, wherein at least one of the first bonding member, the second bonding member, and the structural member is disposed in a region having an area of ⅓ or more of an area of a region of the element substrate that does not overlap the second substrate and excludes the external connection terminal in a planar view with respect to the one principal surface. ### Claim 5 (depends on 1) The semiconductor apparatus according to claim 1, wherein the first bonding member contains a spacer. ### Claim 6 (depends on 5) The semiconductor apparatus according to claim 5, wherein the structural member has a thickness of double or more of a particle diameter of the spacer. ### Claim 7 (depends on 5) The semiconductor apparatus according to claim 5, wherein a particle diameter of the spacer contained in the first bonding member is 1 to 50 μm. ### Claim 8 (depends on 1) The semiconductor apparatus according to claim 1, wherein the second bonding member does not contain a spacer. ### Claim 9 (depends on 1) The semiconductor apparatus according to claim 1, wherein an elasticity modulus of the first bonding member is higher than an elasticity modulus of the second bonding member. ### Claim 10 (depends on 1) The semiconductor apparatus according to claim 1, wherein an elasticity modulus of the first bonding member is 500 MPa or more. ### Claim 11 (depends on 1) The semiconductor apparatus according to claim 1, wherein an elasticity modulus of the second bonding member is 100 MPa or less. ### Claim 12 (depends on 1) The semiconductor apparatus according to claim 1, wherein the first bonding member covers a part of a side surface of the second substrate. ### Claim 13 (depends on 1) The semiconductor apparatus according to claim 1, wherein, in a planar view with respect to the one principal surface, the second substrate is disposed within the element substrate. ### Claim 14 (depends on 1) The semiconductor apparatus according to claim 1, wherein, in a planar view with respect to the one principal surface, the second bonding member extends up to a portion of the element substrate that does not overlap the second substrate. ### Claim 15 (depends on 1) The semiconductor apparatus according to claim 1, wherein an insulating layer covering at least a part of the peripheral region and the effective pixel region is disposed, and wherein the first bonding member is provided on the insulating layer in a portion of the element substrate that does not overlap the second substrate in a planar view with respect to the one principal surface. ### Claim 16 (depends on 1) The semiconductor apparatus according to claim 1, wherein at least one of the plurality of effective pixels includes an organic electroluminescence (EL) element, and a transistor connected to the organic EL element. ### Claim 17 (depends on 1) A photoelectric conversion apparatus comprising: an optical unit including a plurality of lenses; an image sensor configured to receive light having passed through the optical unit; and a display unit configured to display an image captured by the image sensor, wherein the display unit includes a semiconductor apparatus according to claim 1. ### Claim 18 (depends on 1) An electronic device comprising: a display unit including a semiconductor apparatus according to claim 1. ### Claim 19 (depends on 1) An illumination apparatus comprising: a light source including the semiconductor apparatus according to claim 1; and a light diffusion unit or an optical filter configured to let through light emitted by the light source, wherein at least one of the plurality of effective pixels includes an organic EL element. ### Claim 20 (depends on 1) A moving body comprising: an illumination device including the semiconductor apparatus according to claim 1; and a fuselage on which the illumination device is provided, wherein at least one of the plurality of effective pixels includes an organic EL element.