US 2023/0141467 A1Published application

Hybrid integration method

AssigneeHuazhong University of Science and Technology

InventorsWeihua GUO, Xiangyang DAI, Qiaoyin LU

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Abstract

A hybrid integration method includes: assembling a motherboard chip, assembling a daughterboard chip, and assembling an integrated chip. The motherboard chip includes a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region arranged on the motherboard chip body, and the first waveguide region includes a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other; the daughterboard chip includes a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region arranged on the daughterboard chip body, and the second waveguide region includes a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other.

Claims7

Dependent claims

A method, comprising:

assembling a motherboard chip, the motherboard chip comprising a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region being arranged on the motherboard chip body, and the first waveguide region comprising a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other;
assembling a daughterboard chip, the daughterboard chip comprising a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region being arranged on the daughterboard chip body, and the second waveguide region comprising a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other;
and
assembling an integrated chip:
fitting the daughterboard chip upside down to a top end of the motherboard chip, fitting the first vertical support assembly to the second vertical support assembly, fitting or approaching the first coupling waveguide region to the second coupling waveguide region to form a vertical waveguide coupler, and fixedly connecting the first metal region to the second metal region.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/680,267Filed 24 Feb 2022
Priority: CN 202111313111.48 Nov 2021
Published: 11 May 2023
Term ends: Not estimatedThe source records don’t support an estimate.

Classification14 codes

G02B 6/13
Of the integrated circuit kind: integrated optical circuits characterised by the manufacturing method
G02B 6/423
Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements: using guiding surfaces for the alignment
G02B 6/12002
Of the integrated circuit kind: three-dimensional structures
G02B 6/1228
Basic optical elements, e.g. light-guiding paths: tapered waveguides, e.g. integrated spot-size transformers