Semiconductor memory device capable of controlling a floating state of adjacent word lines and an operating method thereof

A semiconductor memory device, comprising:

• first and second memory cells for storing multi-bit data;
• a first word line coupled to the first memory cell;
• a second word line connected to the second memory cell and adjacent to the first word line;
• a voltage generator for generating a second word line voltage provided to the second word line;
• and
• a word line connect circuit connected between the voltage generator and the second word line;
• wherein a period in which a first word line voltage for reading data stored in the first memory cell is applied comprises:
• a first period in which a first voltage level is applied to read first bit data from the multi-bit data stored in the first memory cell;
• a second period having a second voltage level lower than the first voltage level;
• and
• a third period in which a third voltage level higher than the second voltage level is applied to read second bit data from the multi-bit data stored in the first memory cell,
• wherein the second word line voltage provided to the second word line is cut off in the second period.

A method of operating a semiconductor memory device, the semiconductor memory device comprising first and second memory cells for storing multi-bit data, a first word line coupled to the first memory cell, and a second word line connected to the second memory cell and adjacent to the first word line, the method comprising:

• applying a first voltage to the first word line to read first bit data from the multi-bit data stored in the first memory cell;
• applying a second voltage lower than the first voltage;
• and
• applying a third voltage higher than a second voltage to the first word line to read second bit data from the multi-bit data stored in the first memory cell,
• wherein the second word line is in a floating state when the second voltage is applied.