US 2023/0140969 A1 · MEMORY DEVICE INCLUDING RECEIVING CIRCUIT, ELECTRONIC DEVICE, AND RECEIVED SIGNAL PROCESSING METHOD OF ELECTRONIC DEVICE

Abstract

A memory device including a receiving circuit is provided. The receiving circuit of the memory device includes a first path receiving a received signal and outputting the received signal directly as a first corrected signal in a current clock signal, a second path holding or tracking the received signal and outputting a second corrected signal in the current clock signal, wherein the second corrected signal is held in a previous clock signal, a summing circuit summing the first corrected signal and the second corrected signal and outputting a summed received signal, and a decision feedback equalizer comparing the summed received signal with a reference signal to decide equalized data and outputting the equalized data in the current clock signal.

Claims20

Dependent claims

A memory device, comprising:

a receiving circuit, the receiving circuit including:
a first path receiving a received signal, and outputting the received signal directly as a first corrected signal in a current clock signal;
a second path holding or tracking the received signal, and outputting a second corrected signal in the current clock signal, wherein the second corrected signal is held in a previous clock signal;
a summing circuit summing the first corrected signal and the second corrected signal, and outputting a summed received signal;
and
a decision feedback equalizer comparing the summed received signal with a reference signal to decide equalized data, and outputting the equalized data in the current clock signal.

3 more elements

Dependencies are inferred from the claim text.

Memory device including receiving circuit, electronic device, and received signal processing method of electronic device

Life of this patent

Memory device including receiving circuit, electronic device, and received signal processing method of electronic device

Life of this patent

Abstract

Claims20