Back to results
US 2023/0140876 A1Published application
Three-dimensional fpga with structure asic hardening capability
AssigneeOppstar Technology Sdn Bhd
InventorsKim Pin Tan, Hun Wah Cheah
Life of this patent
Estimating the term…
Abstract
Circuit devices include a first chip that includes functional blocks. A second chip has routing circuitry that provides configurable signal communications between functional blocks of the first chip and configuration memory that controls the routing circuitry and that further controls operation of the functional blocks of the first chip.
Claims20
A circuit device, comprising:
- a first chip that includes a plurality of functional blocks;
- and
- a second chip that includes:
- routing circuitry that provides configurable signal communications between functional blocks of the first chip;
- and
- configuration memory that controls the routing circuitry and that further controls operation of the plurality of functional blocks of the first chip.
3 more elements
A circuit device, comprising:
- functional layers that include a plurality of functional blocks and a hardwired configuration path that outputs a configuration signal to control operation of a configured functional block of the plurality of functional blocks;
- and
- routing layers that include a hardwired routing interconnect between a pair of functional blocks of the first chip.
A configurable routing chip, comprising:
- a plurality of inter-chip contacts;
- routing circuitry that implements configurable signal communications between a pair of inter-chip contacts, including a plurality of routing blocks;
- and
- a plurality of routing configuration random access memory (CRAM) blocks that control the routing circuitry, each associated with a respective routing block of the plurality of routing blocks;
- and
- a plurality of functional block CRAM blocks that output configuration signals to the inter-chip contacts.
3 more elements
Dependencies are inferred from the claim text.