Loading patent…
AssigneeCatlam, LLC
InventorsKenneth S. BAHL, Steven CARNEY, Jagdip SINGH, Steven DUTTON
Estimating the term…
A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.
A process for forming a catalytic laminate with traces, the process comprising:
The process of claim 9 where the first solution comprises a mixture containing copper in the range 1.7-2.4 g/L, sodium hydroxide range of 7.0-8.0 g/L, formaldehyde range of 2.0-3.5 g/L, and Ethylenediamine tetra-acetic acid (EDTA) range of 35-25 g/L.
The process of claim 9 where the dry film is planar.
The process of claim 12 where the dry film is polymerized after application as a planar layer.
The process of claim 15 where the catalytic laminate has catalytic particles an exclusion depth below a surface, and forming channels includes a surface etch to expose the catalytic particles.
A process for forming a circuit layer with traces on a laminate, the process comprising:
The process of claim 16 where the first solution has a temperature in the range 33-43° C.
The process of claim 19 where the second solution has a temperature in the range 50-54° C.
A process for forming a circuit layer in a laminate, the process comprising:
A process for forming a circuit layer in a laminate having a thin surface foil, the process comprising:
Dependencies are inferred from the claim text.