Amplifier circuit, differential amplifier circuit, reception circuit, and semiconductor integrated circuit

A differential amplifier circuit including:

• a first circuit including a first transistor connected between a first input node through which a first input current flows and a reference potential node, the first transistor having a gate electrode connected to the first input node;
• a second circuit including a first low-pass filter circuit and a second transistor connected in parallel to the first transistor between the first input node and the reference potential node, the second transistor having a gate electrode connected to the gate electrode of the first transistor via the first low-pass filter circuit;
• a third circuit including a third transistor connected between a first output node through which a first output current flows and the reference potential node, the third transistor having a gate electrode connected to the gate electrode of the first transistor;
• a fourth circuit including a fourth transistor connected between a second input node through which a second input current flows and the reference potential node, the fourth transistor having a gate electrode connected to the second input node;
• a fifth circuit including a second low-pass filter circuit and a fifth transistor connected in parallel to the fourth transistor between the second input node and the reference potential node, the fifth transistor having a gate electrode connected to the gate electrode of the fourth transistor via the second low-pass filter circuit;
• a sixth circuit including a sixth transistor connected between a second output node through which a second output current flows and the reference potential node, the sixth transistor having a gate electrode connected to the gate electrode of the fourth transistor;
• a seventh circuit including a seventh transistor connected between the second input node and the reference potential node, the seventh transistor having a gate electrode connected to the gate electrode of the first transistor;
• and
• an eighth circuit including an eighth transistor connected between the first input node and the reference potential node, the eighth transistor having a gate electrode connected to the gate electrode of the fourth transistor.