Radio-frequency Power Amplifier with Amplitude Modulation to Amplitude Modulation (AMAM) Compensation

A method of operating a radio-frequency power amplifier, the method comprising:

• receiving a radio-frequency signal at a gate terminal of a first input transistor;
• receiving the radio-frequency signal at a gate terminal of a second input transistor;
• deactivating a first bias transistor when a voltage swing of the radio-frequency signal is less than a predetermined value, the first bias transistor having a first source-drain terminal coupled to the gate terminal of the first input transistor and having a second source-drain terminal configured to receive a positive power supply voltage;
• deactivating a second bias transistor when the voltage swing of the radio-frequency signal is less than the predetermined value, the second bias transistor having a first source-drain terminal coupled to the gate terminal of the second input transistor and having a second source-drain terminal configured to receive the positive power supply voltage;
• and
• in response to the voltage swing of the radio-frequency signal being greater than the predetermined value, increasing a voltage at the gate terminals of the first and second input transistors by activating the first and second bias transistors.

An electronic device comprising:

• one or more processors configured to generate digital signals;
• a transceiver configured to generate radio-frequency signals based on the digital signals;
• and
• power amplifier circuitry configured to amplify the radio-frequency signals for wireless transmission by an antenna, the power amplifier circuitry including
• a first input transistor having a source terminal coupled to a ground line, a drain terminal coupled to a first output terminal, and a gate terminal coupled to a first input terminal,
• a second input transistor having a source terminal coupled to the ground line, a drain terminal coupled to a second output terminal, and a gate terminal coupled to a second input terminal, the first and second input terminals being coupled to the antenna,
• a first source follower transistor having a source terminal coupled to the first input terminal, a drain terminal coupled to a positive power supply line, and a gate terminal,
• a first resistor having a first terminal coupled to the gate terminal of the first source follower transistor and having a second terminal configured to receive a control voltage,
• a second source follower transistor having a source terminal coupled to the second input terminal, a drain terminal coupled to the positive power supply line, and a gate terminal, and
• a second resistor having a first terminal coupled to the gate terminal of the second source follower transistor and having a second terminal configured to receive the control voltage.