# US 2023/0069752 A1 · Automotive boot optimization

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- Number: US 2023/0069752 A1
- Document ID: US20230069752A1
- Status: Published application
- Kind: A1
- Application number: 17/646,254
- Filed: 2021-12-28
- Published: 2023-03-02
- Earliest claimed: 2021-08-27
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Roberto Izzi; Luca Porzio; Dionisio Minopoli
- Web page: https://patentgrep.com/patent/US20230069752A1

## CPC

- G06F 9/4406: {Loading of operating system}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Methods, systems, and devices for automotive boot optimization are described. For instance, a memory system may record addresses that are accessed as part of multiple phases of a first boot-up procedure. During a second boot-up procedure, the memory system may transfer, from a logical block address of a non-volatile memory device to a volatile memory device, information for a respective phase based on the recording of the phases of the first boot-up procedure. The memory system may receive a command to transmit the information to a host system as part of the respective phase after transferring the information from the non-volatile device to the volatile memory device.

## Claims

### Claim 1

An apparatus, comprising:
a non-volatile memory device;
a volatile memory device; and
a controller coupled with the non-volatile memory device and the volatile memory device and configured to cause the apparatus to:
record a first phase of a first boot-up procedure and a second phase of the first boot-up procedure;
detect that the first phase of a second boot-up procedure is occurring, wherein the second boot-up procedure occurs after the first boot-up procedure;
transfer, from a first logical block address of the non-volatile memory device to the volatile memory device, first information for the first phase of the second boot-up procedure based at least in part on the recording of the first phase of the first boot-up procedure and in response to detecting that the first phase of the second boot-up procedure is occurring;
receive a first command to transmit the first information to a host system as part of the first phase of the second boot-up procedure after transferring the first information from the non-volatile memory device to the volatile memory device;
detect that the second phase of the second boot-up procedure is occurring;
transfer, from a second logical block address of the non-volatile memory device to the volatile memory device, second information for the second phase of the second boot-up procedure based at least in part on the recording of the second phase of the first boot-up procedure and in response to detecting that the second phase of the second boot-up procedure is occurring; and
receive a second command to transmit the second information to the host system as part of the second phase of the second boot-up procedure after transferring the second information from the non-volatile memory device to the volatile memory device.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the controller is configured to cause the apparatus to:
record a third phase of the first boot-up procedure;
detect that the third phase of the second boot-up procedure is occurring;
transfer, from a third logical block address of the non-volatile memory device to the volatile memory device, third information for the third phase of the second boot-up procedure based at least in part on the recording of the third phase of the first boot-up procedure and in response to detecting that the third phase of the second boot-up procedure is occurring; and
receive a third command to transmit the third information to the host system as part of transferring the third information from the non-volatile memory device to the volatile memory device.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the first phase comprises a universal flash storage boot phase, the second phase comprises kernel loading boot phase, and the third phase comprises a kernel start boot phase.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the controller being configured to cause the apparatus to record the first phase of the first boot-up procedure and the second phase of the first boot-up procedure comprises the controller being configured to cause the apparatus to:
record the first phase of the first boot-up procedure;
perform a reset on one or more components of the non-volatile memory device based at least in part on recording the first phase of the first boot-up procedure; and
record the second phase of the first boot-up procedure based at least in part on performing the reset on the one or more components of the non-volatile memory device.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the controller being configured to perform the reset on the one or more components comprises the controller being configured to cause the apparatus to:
isolate the one or more components of the non-volatile memory device from a voltage source;
recouple the one or more components of the non-volatile memory device with the voltage source.

### Claim 6 (depends on 4)

The apparatus of claim 4, wherein the controller is further configured to:
perform a second reset on the one or more components of the non-volatile memory device before recording the first phase of the first boot-up procedure, wherein recording the first phase of the first boot-up procedure is based at least in part on performing the second reset.

### Claim 7 (depends on 4)

The apparatus of claim 4, wherein the controller is further configured to:
perform a second reset on the one or more components of the non-volatile memory device based at least in part on recording the second phase of the first boot-up procedure; and
record a third phase of the first boot-up procedure based at least in part on performing the second reset.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the controller is further configured to:
receive one or more commands to transmit one or more instances of information to the host system;
retrieve the one or more instances of information from the non-volatile memory device based at least in part on receiving the one or more commands, wherein the one or more instances of information are not transferred to the volatile memory device between detecting that the first phase of the second boot-up procedure is occurring and receiving the one or more commands;
determine that a quantity of the one or more instances of information is greater than a threshold quantity; and
rerecord the first phase or the second phase of the second boot-up procedure based at least in part on determining that the quantity of the one or more instances of information is greater than the threshold quantity.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the controller is further configured to:
receive one or more commands to transmit one or more instances of information to the host system;
retrieve the one or more instances of information from the non-volatile memory device based at least in part on receiving the one or more commands, wherein the one or more instances of information are not transferred to the volatile memory device between detecting that the first phase of the second boot-up procedure is occurring and receiving the one or more commands;
determine that a quantity of the one or more instances of information is less than a threshold quantity; and
transfer third information stored at a third logical block address of the non-volatile memory device into the volatile memory device for the first phase or the second phase of the second boot-up procedure based at last in part on determining that the quantity of the one or more instances of information is less than the threshold quantity.

### Claim 10 (depends on 1)

The apparatus of claim 1, wherein the non-volatile memory device comprises a not-AND (NAND) memory device and the volatile memory device comprises a dynamic random access memory (DRAM) memory device.

### Claim 11

A non-transitory computer-readable medium comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:
record a first phase of a first boot-up procedure and a second phase of the first boot-up procedure;
detect that the first phase of a second boot-up procedure is occurring, wherein the second boot-up procedure occurs after the first boot-up procedure;
transfer, from a first logical block address of a non-volatile memory device to a volatile memory device, first information for the first phase of the second boot-up procedure based at least in part on the recording of the first phase of the first boot-up procedure and in response to detecting that the first phase of the second boot-up procedure is occurring;
receive a first command to transmit the first information to a host system as part of the first phase of the second boot-up procedure after transferring the first information from the non-volatile memory device to the volatile memory device;
detect that the second phase of the second boot-up procedure is occurring;
transfer, from a second logical block address of the non-volatile memory device to the volatile memory device, second information for the second phase of the second boot-up procedure based at least in part on the recording of the second phase of the first boot-up procedure and in response to detecting that the second phase of the second boot-up procedure is occurring; and
receive a second command to transmit the second information to the host system as part of the second phase of the second boot-up procedure after transferring the second information from the non-volatile memory device to the volatile memory device.

### Claim 12 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
record a third phase of the first boot-up procedure;
detect that the third phase of the second boot-up procedure is occurring;
transfer, from a third logical block address of the non-volatile memory device to the volatile memory device, third information for the third phase of the second boot-up procedure based at least in part on the recording of the third phase of the first boot-up procedure and in response to detecting that the third phase of the second boot-up procedure is occurring; and
receive a third command to transmit the third information to the host system as part of transferring the third information from the non-volatile memory device to the volatile memory device.

### Claim 13 (depends on 12)

The non-transitory computer-readable medium of claim 12, wherein the first phase comprises a universal flash storage boot phase, the second phase comprises kernel loading boot phase, and the third phase comprises a kernel start boot phase.

### Claim 14 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the instructions causing the electronic device to record the first phase of the first boot-up procedure and the second phase of the first boot-up procedure cause the electronic device, when executed by the processor of the electronic device, to:
record the first phase of the first boot-up procedure;
perform a reset on one or more components of the non-volatile memory device based at least in part on recording the first phase of the first boot-up procedure;
record the second phase of the first boot-up procedure based at least in part on performing the reset on the one or more components of the non-volatile memory device.

### Claim 15 (depends on 14)

The non-transitory computer-readable medium of claim 14, wherein the instructions causing the electronic device to perform the reset on the one or more components cause the electronic device, when executed by the processor of the electronic device to:
isolate the one or more components of the non-volatile memory device from a voltage source; and
recouple the one or more components of the non-volatile memory device with the voltage source.

### Claim 16 (depends on 14)

The non-transitory computer-readable medium of claim 14, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
perform a second reset on the one or more components of the non-volatile memory device before recording the first phase of the first boot-up procedure, wherein recording the first phase of the first boot-up procedure is based at least in part on performing the second reset.

### Claim 17 (depends on 14)

The non-transitory computer-readable medium of claim 14, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
perform a second reset on the one or more components of the non-volatile memory device based at least in part on recording the second phase of the first boot-up procedure; and
record a third phase of the first boot-up procedure based at least in part on performing the second reset.

### Claim 18 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
receive one or more commands to transmit one or more instances of information to the host system;
retrieve the one or more instances of information from the non-volatile memory device based at least in part on receiving the one or more commands, wherein the one or more instances of information are not transferred to the volatile memory device between detecting that the first phase of the second boot-up procedure is occurring and receiving the one or more commands;
determine that a quantity of the one or more instances of information is greater than a threshold quantity; and
rerecord the first phase or the second phase of the second boot-up procedure based at least in part on determining that the quantity of the one or more instances of information is greater than the threshold quantity.

### Claim 19 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:
receive one or more commands to transmit one or more instances of information to the host system;
retrieve the one or more instances of information from the non-volatile memory device based at least in part on receiving the one or more commands, wherein the one or more instances of information are not transferred to the volatile memory device between detecting that the first phase of the second boot-up procedure is occurring and receiving the one or more commands;
determine that a quantity of the one or more instances of information is less than a threshold quantity; and
transfer third information stored at a third logical block address of the non-volatile memory device into the volatile memory device for the first phase or the second phase of the second boot-up procedure based at last in part on determining that the quantity of the one or more instances of information is less than the threshold quantity.

### Claim 20 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the non-volatile memory device comprises a not-AND (NAND) memory device and the volatile memory device comprises a dynamic random access memory (DRAM) memory device.

### Claim 21

A method, comprising:
recording a first phase of a first boot-up procedure and a second phase of the first boot-up procedure;
detecting that the first phase of a second boot-up procedure is occurring, wherein the second boot-up procedure occurs after the first boot-up procedure;
transferring, from a first logical block address of a non-volatile memory device to a volatile memory device, first information for the first phase of the second boot-up procedure based at least in part on the recording of the first phase of the first boot-up procedure and in response to detecting that the first phase of the second boot-up procedure is occurring;
receiving a first command to transmit the first information to a host system as part of the first phase of the second boot-up procedure after transferring the first information from the non-volatile memory device to the volatile memory device;
detecting that the second phase of the second boot-up procedure is occurring;
transferring, from a second logical block address of the non-volatile memory device to the volatile memory device, second information for the second phase of the second boot-up procedure based at least in part on the recording of the second phase of the first boot-up procedure and in response to detecting that the second phase of the second boot-up procedure is occurring; and
receiving a second command to transmit the second information to the host system as part of the second phase of the second boot-up procedure after transferring the second information from the non-volatile memory device to the volatile memory device.

### Claim 22 (depends on 21)

The method of claim 21, further comprising:
recording a third phase of the first boot-up procedure;
detecting that the third phase of the second boot-up procedure is occurring;
transferring, from a third logical block address of the non-volatile memory device to the volatile memory device, third information for the third phase of the second boot-up procedure based at least in part on the recording of the third phase of the first boot-up procedure and in response to detecting that the third phase of the second boot-up procedure is occurring; and
receiving a third command to transmit the third information to the host system as part of transferring the third information from the non-volatile memory device to the volatile memory device.

### Claim 23 (depends on 22)

The method of claim 22, wherein the first phase comprises a universal flash storage boot phase, the second phase comprises kernel loading boot phase, and the third phase comprises a kernel start boot phase.

### Claim 24 (depends on 21)

The method of claim 21, wherein recording the first phase of the first boot-up procedure and the second phase of the first boot-up procedure comprises:
recording the first phase of the first boot-up procedure;
performing a reset on one or more components of the non-volatile memory device based at least in part on recording the first phase of the first boot-up procedure; and
recording the second phase of the first boot-up procedure based at least in part on performing the reset on the one or more components of the non-volatile memory device.

### Claim 25 (depends on 24)

The method of claim 24, wherein performing the reset on the one or more components comprises:
isolating the one or more components of the non-volatile memory device from a voltage source; and
recoupling the one or more components of the non-volatile memory device with the voltage source.