# US 2023/0066447 A1 · Execution of code in system memory

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2023/0066447 A1
- Document ID: US20230066447A1
- Status: Published application
- Kind: A1
- Application number: 17/411,045
- Filed: 2021-08-24
- Published: 2023-03-02
- Earliest claimed: 2021-08-24
- Assignees: Hewlett-Packard Development Company, L.P.
- Applicants: Hewlett-Packard Development Company, L.P.
- Inventors: Richard Alden Bramley, JR.; Dallas M. Barlow; Jeffrey Kevin Jeansonne
- Web page: https://patentgrep.com/patent/US20230066447A1

## CPC

- G06F 9/4418: {Suspend and resume; Hibernate and awake}
- G06F 9/45558: {Hypervisor-specific management and integration aspects}
- G06F 9/455: Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F 9/45533: {Hypervisors; Virtual machine monitors}
- G06F 2009/45579: {I/O management, e.g. providing access to device drivers or storage}
- G06F 2009/45583: {Memory management, e.g. access or allocation}
- G06F 2009/45587: {Isolation or security of virtual machine instances}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

In some examples, a computing device includes memory including system memory, and a processor in electronic communication with the memory. In some examples, the processor receives a system management interrupt. In some examples, the processor identifies trigger code that triggered the system management interrupt. In some examples, the processor executes code from the system memory when the trigger code is a virtualization program.

## Claims

### Claim 1

A computing device, comprising:
memory including system memory; and
a processor in electronic communication with the memory, wherein the processor is to:
receive a system management interrupt;
identify trigger code that triggered the system management interrupt; and
execute code from the system memory when the trigger code is a virtualization program.

### Claim 2 (depends on 1)

The computing device of claim 1, wherein the code from the system memory implements a command triggered from the virtualization program running as a root of virtualization (VM ROOT).

### Claim 3 (depends on 1)

The computing device of claim 1, wherein the code from the system memory implements a command from outside of the system memory.

### Claim 4 (depends on 1)

The computing device of claim 1, wherein the processor blocks the code from the system memory when the trigger code is not the virtualization program.

### Claim 5

An electronic device, comprising:
memory including system management random access memory (SMRAM); and
a processor in electronic communication with the memory, wherein the processor is to:
enter system management mode;
determine whether virtualization is active;
determine whether the processor is in root mode; and
execute code from the SMRAM when virtualization is active and when the processor is in root mode.

### Claim 6 (depends on 5)

The electronic device of claim 5, wherein determining whether virtualization is active comprises reading a virtual machine execution control field from a save state area of the memory.

### Claim 7 (depends on 5)

The electronic device of claim 5, wherein determining whether virtualization is active comprises reading an extended feature enable register value from a save state area of the memory.

### Claim 8 (depends on 5)

The electronic device of claim 5, wherein determining whether the processor is in root mode comprises reading a virtual machine execution control field from a save state area of the memory.

### Claim 9 (depends on 5)

The electronic device of claim 5, wherein determining whether the processor is in root mode comprises reading a secure virtual machine value from a save state area of the memory.

### Claim 10

A computing device, comprising:
a processor to:
save a processor state when a system management interrupt occurs;
enter system management mode (SMM);
identify an active virtual machine extensions (VMX) mode based on the saved processor state; and
execute an SMM operation when the active VMX mode is VMX root mode.

### Claim 11 (depends on 10)

The computing device of claim 10, wherein the processor is to ignore the SMM operation when the active VMX mode is VMX non-root mode.

### Claim 12 (depends on 10)

The computing device of claim 10, wherein the processor is to trigger the system management interrupt based on an exception.

### Claim 13 (depends on 12)

The computing device of claim 12, wherein the system management interrupt is triggered by a software write to an input/output (I/O) port.

### Claim 14 (depends on 10)

The computing device of claim 10, wherein the processor is to reboot when the active VMX mode is VMX non-root mode.

### Claim 15 (depends on 10)

The computing device of claim 10, wherein the SMM operation was called by a hypervisor when the active VMX mode is the VMX root mode.