# US 2023/0065663 A1 · Integrated circuit with backside conductive layers

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- Number: US 2023/0065663 A1
- Document ID: US20230065663A1
- Status: Published application
- Kind: A1
- Application number: 17/446,515
- Filed: 2021-08-31
- Published: 2023-03-02
- Earliest claimed: 2021-08-31
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Te-Hsin CHIU; Shih-Wei PENG; Wei-Cheng LIN; Jiann-Tyng TZENG; Jiun-Wei LU
- Web page: https://patentgrep.com/patent/US20230065663A1

## CPC

- H10W 20/427: {Power or ground buses}
- H10W 20/43: Layouts of interconnections
- H10D 89/10: Integrated device layouts
- H10P 32/00: Diffusion of dopants within, into or out of wafers, substrates or parts of devices (during formation of materials H10P14/00)
- H10W 20/01: {Manufacture or treatment}
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10W 20/481: {on the rear surfaces of the wafers or substrates}
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit includes multiple backside conductive layers disposed over a backside of a substrate. The multiple backside conductive layers each includes conductive segments. The conductive segments in at least one of the backside conductive layers are configured to transmit one or more power signals. The conductive segments of the multiple backside conductive layers cover select areas of the backside of the substrate, thereby leaving other areas of the backside of the substrate exposed.

## Claims

### Claim 1

An integrated circuit comprising a cell, comprising:
a substrate;
a first backside conductive layer formed over a backside of the substrate comprising a first plurality of conductive segments; and
a second backside conductive layer formed over the first backside conductive layer, the second backside conductive layer comprising a second plurality of conductive segments each configured to transmit power signals, wherein:
the first plurality of conductive segments and the second plurality of conductive segments cover select areas of the backside of the substrate to leave other areas of the backside of the substrate exposed; and
one area of the backside of the substrate that is exposed comprises an output region of the cell.

### Claim 2 (depends on 1)

The integrated circuit of claim 1, further comprising a third backside conductive layer formed over the second backside conductive layer, the third backside conductive layer comprising a third plurality of conductive segments that cover only select areas of the backside of the substrate to leave the other areas of the backside of the substrate exposed.

### Claim 3 (depends on 2)

The integrated circuit of claim 2, wherein an area of at least a top section or a bottom section of a respective conductive segment in the third plurality of conductive segments has a larger area compared to a middle section of the respective conductive segment.

### Claim 4 (depends on 1)

The integrated circuit of claim 1, wherein the integrated circuit further comprises:
a first active diffusion (AD) region formed in the backside of the sub strate;
a second AD region formed in the backside of the substrate; and
a conductive via electrically connecting a respective conductive segment in the first plurality of conductive segments to one of the first AD region or the second AD region.

### Claim 5 (depends on 4)

The integrated circuit of claim 4, further comprising gate lines formed below the first conductive layer and over the first and the second AD regions.

### Claim 6 (depends on 1)

The integrated circuit of claim 1, wherein a respective conductive segment in the second plurality of conductive segments contacts directly a respective conductive segment in the first plurality of conductive segments.

### Claim 7 (depends on 1)

The integrated circuit of claim 1, wherein the integrated circuit further comprises a conductive contact formed between a respective conductive segment in the first plurality of conductive segments and a respective conductive segment in the second plurality of conductive segments.

### Claim 8 (depends on 1)

The integrated circuit of claim 1, wherein the other areas of the backside of the substrate that are exposed are detectable with at least one of a laser, an emission microscopy, or an electron beam.

### Claim 9

An integrated circuit comprising a cell, comprising:
a substrate;
a first backside conductive layer formed over a backside of the substrate, the first backside conductive layer comprising a first plurality of conductive segments; and
a second backside conductive layer formed over the first backside conductive layer and comprising a second plurality of conductive segments that are configured to transmit power signals, wherein:
the first plurality and the second plurality of conductive segments cover select areas of the backside of the substrate to leave other areas of the backside of the substrate exposed; and
one area of the backside of the substrate that is covered by the conductive segments comprises a power region of the cell.

### Claim 10 (depends on 9)

The integrated circuit of claim 9, further comprising a third backside conductive layer formed over the second backside conductive layer and comprising a third plurality of conductive segments.

### Claim 11 (depends on 10)

The integrated circuit of claim 10, wherein an area of at least a top section or a bottom section of a respective conductive segment in the third plurality of conductive segments has a larger area compared to an area of a middle section of the respective conductive segment.

### Claim 12 (depends on 9)

The integrated circuit of claim 9, wherein the integrated circuit further comprises:
a first active diffusion (AD) region formed in the backside of the substrate;
a second AD region formed in the backside of the substrate; and
a conductive via electrically connecting a respective conductive segment in the first plurality of conductive segments to one of the first AD region or the second AD region.

### Claim 13 (depends on 12)

The integrated circuit of claim 12, further comprising gate lines formed below the first conductive layer and over the first and the second AD regions.

### Claim 13

A method, comprising:
forming a first active diffusion (AD) region in a backside of a substrate;
forming a second AD region in the backside of the substrate;
forming a first backside conductive layer over the backside of the substrate that includes a first plurality of conductive segments; and
forming a second backside conductive layer over the first backside conductive layer that includes a second plurality of conductive segments, wherein:
the second plurality of conductive segments are configured to transmit power signals; and
the first and the second conductive segments cover select areas of the backside of the substrate to leave other areas of the backside of the substrate exposed.

### Claim 14 (depends on 9)

The integrated circuit of claim 9, wherein a respective conductive segment in the second plurality of conductive segments contacts directly a respective conductive segment in the first plurality of conductive segments.

### Claim 15 (depends on 9)

The integrated circuit of claim 9, wherein the integrated circuit further comprises a conductive contact formed between a respective conductive segment in the first plurality of conductive segments and a respective conductive segment in the second plurality of conductive segments.

### Claim 16 (depends on 9)

The integrated circuit of claim 9, wherein the other areas of the backside of the substrate that are exposed are detectable with at least one of a laser, an emission microscopy, or an electron beam.

### Claim 18 (depends on 17)

The method of claim 17, wherein the forming of the first backside conductive layer comprises forming a respective conductive segment in the first plurality of conductive segments to contact directly a respective conductive segment in the second plurality of conductive segments.

### Claim 19 (depends on 17)

The method of claim 17, further comprising forming a conductive contact between a respective conductive segment in the first plurality of conductive segments and a respective conductive segment in the second plurality of conductive segments.

### Claim 20 (depends on 17)

The method of claim 17, further comprising:
forming a third backside conductive layer over the second backside conductive layer, the third backside conductive layer comprising a third plurality of conductive segments,
wherein the forming of the third backside conductive layer comprises forming a respective conductive segment in the third plurality of conductive segments to have an area at least a top section or a bottom section of the respective conductive segment that is larger than an area of a middle section of the respective conductive segment.