Neural network memory
AssigneeMicron Technology, Inc.
InventorsMattia Boniardi, Innocenzo Tortorelli
Life of this patent
Estimating the term…
Abstract
An example apparatus can include a memory array and a memory controller. The memory array can include a first portion including a first plurality of memory cells. The memory array can further include a second portion including a second plurality of memory cells. The memory controller can be coupled to the first portion and the second portion. The memory controller can be configured to operate the first plurality of memory cells for short-term memory operations. The memory controller can be further configured to operate the second plurality of memory cells for long-term memory operations.
Claims21
1-20. (canceled)
An apparatus, comprising:
- a memory array comprising:
- a portion comprising a plurality of variable resistance memory cells that have been degraded through forced write cycling;
- and
- a memory controller coupled to the portion, wherein the memory controller is configured to:
- operate the portion for long-term memory operations;
- and
- perform the forced write cycling on the plurality of variable resistance memory cells prior to operating the portion.
An apparatus, comprising:
- a memory array comprising a portion comprising a plurality of variable resistance memory cells;
- and
- a memory controller coupled to the portion, wherein the memory controller is configured to:
- operate the portion for short-term memory operations;
- and
- reclassify a particular one of the plurality of variable resistance memory cells as one of a different plurality of variable resistance memory cells in response to an operating criterion being met.
A method, comprising:
- performing a first plurality of neural network operations on a plurality of short-term memory cells of a memory array;
- performing a second plurality of neural network operations on a plurality of long-term memory cells of the memory array, and
- transferring data stored in at least one of the plurality of short-term memory cells to be stored in at least one of the plurality of long-term memory cells.
Dependencies are inferred from the claim text.