# US 2023/0058073 A1 · Gallium nitride device for high frequency and high power applications

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- Number: US 2023/0058073 A1
- Document ID: US20230058073A1
- Status: Published application
- Kind: A1
- Application number: 18/047,914
- Filed: 2022-10-19
- Published: 2023-02-23
- Earliest claimed: 2017-05-12
- Assignees: Analog Devices, Inc.
- Applicants: Analog Devices, Inc.
- Inventors: Puneet Srivastava; James G. Fiorenza
- Web page: https://patentgrep.com/patent/US20230058073A1

## CPC

- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 64/112: {comprising multiple field plate segments}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10P 14/3416: {Nitrides}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/111: {Field plates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal structure of a first substrate. The semiconductor device further includes a layer of a second semiconducting material disposed adjacent to the layer of the first semiconducting material to form a heterojunction with the layer of the first semiconducting material. The semiconductor device further includes a first component that is electrically coupled to the heterojunction, and a second substrate that is bonded to the layer of the first semiconducting material.

## Claims

### Claim 1

A method of manufacturing a semiconductor device, the method comprising:
receiving, obtaining, or providing a starting material that comprises:
a first substrate having a first crystal structure,
a layer of sacrificial material that has a second crystal structure based on the first crystal structure and is adjacent to the first substrate,
a layer of a first semiconducting material that has a third crystal structure based on the first crystal structure and is adjacent to the layer of material, and
a layer of a second semiconducting material that forms a heterojunction with the layer of the first semiconducting material;
forming a first component of the semiconductor device, the first component electrically coupled to the heterojunction; and
removing the first substrate to expose a surface of the layer of the first semiconducting material.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
growing a first portion of the layer of the first semiconducting material;
depositing a layer of etch stop material on the partially grown layer of the first semiconducting material; and
growing a second portion of the layer of the first semiconducting material over the first portion and the etch stop material, the second portion being grown to a specified height;
wherein the etch stop material and the specified height is selected to determine a distance of a backside field plate formed in the first layer of semiconducting material from the hetero junction.

### Claim 3 (depends on 1)

The method of claim 1, wherein the sacrificial material comprises graphene.

### Claim 4 (depends on 1)

The method of claim 1, wherein at least one of the layers of the starting material is grown epitaxially to the first substrate.

### Claim 5 (depends on 1)

The method of claim 1, further comprising forming, prior to the bonding, a second component of the semiconductor device that contacts the layer of the first semiconducting material without contacting the layer of the second semiconducting material.

### Claim 6 (depends on 5)

The method of claim 5, wherein the first component includes a first field plate, and the second component includes a second field plate, the second field plate being aligned with the first field plate or a gate electrode.

### Claim 7 (depends on 6)

The method according to claim 6, wherein forming the second field plate comprises one or more of:
doping a portion of the first semiconducting material to increase a density of minority charge carriers;
replacing the portion with a metal, a low temperature regrown ohmic contact, or a hetero-structure; and
epitaxially growing a doped material.

### Claim 8 (depends on 1)

The method of claim 1, further comprising
bonding, to a second substrate, the exposed surface of the layer of the first semiconducting material; and
forming at least one component of the semiconductor device after bonding the exposed surface to the second substrate.

### Claim 9 (depends on 1)

The method of claim 1, further comprising manufacturing a second semiconductor device using the first substrate.