# US 2023/0056733 A1 · METHOD OF ACCESSING NVMeoF MEMORY REGION OF A REMOTE TARGET DEVICE BY A HOST CPU > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0056733 A1 - Document ID: US20230056733A1 - Status: Published application - Kind: A1 - Application number: 17/806,148 - Filed: 2022-06-09 - Published: 2023-02-23 - Earliest claimed: 2021-08-17 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: VENKATARATNAM NIMMAGADDA; Sandeep Kumar Ananthapalli - Web page: https://patentgrep.com/patent/US20230056733A1 ## CPC - G06F 3/0655: {Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices} - G06F 3/067: {Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]} - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/061: {Improving I/O performance} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method of accessing a Non-Volatile Memory express over Fabrics (NVMeoF) memory region of a remote target device includes establishing a NVMeoF transport connection with the remote target device and creating an admin queue by sending a NVMeoF connect command to the remote target device. The method includes accessing the NVMeoF memory region of the remote target device by sending PropertyGet/PropertySet commands to an admin submission queue of the remote target device, performing one of (a) receiving PropertyGet/PropertySet completion queue entries from the remote target device when accessing the NVMeoF memory region of the remote target device is completed, or (b) receiving at least one of RDMA write and RDMA read requests from the remote target device in response to PropertyGet/PropertySet submission queue entries, and receiving completion queue entries from the remote target device when the accessing of the NVMeoF memory region of the remote target device is completed. ## Claims ### Claim 1 A method of accessing a Non-Volatile Memory express over Fabrics (NVMeoF) memory region of a remote target device by a host Central Processing Unit (CPU), the method comprising: establishing, by the host CPU, a NVMeoF transport connection with the remote target device; creating, by the host CPU, an admin queue by sending a NVMeoF connect command to the remote target device when the NVMeoF transport connection is established with the remote target device; accessing, by the host CPU, the NVMeoF memory region of the remote target device by sending PropertyGet/PropertySet commands to an admin submission queue of the remote target device; performing one of (a) receiving, by the host CPU, PropertyGet/PropertySet completion queue entries from the remote target device when accessing the NVMeoF memory region of the remote target device is completed, or (b) receiving, by the host CPU, Remote Direct Memory Access (RDMA) write or RDMA read requests from the remote target device in response to PropertyGet/PropertySet submission queue entries; and receiving, by the host CPU, completion queue entries from the remote target device when the accessing of the NVMeoF memory region of the remote target device is completed. ### Claim 2 (depends on 1) The method of claim 1, wherein the NVMeoF memory region of the remote target device comprises at least one of a Controller Memory Buffer (CMB) and a Persistent Memory Region (PMR). ### Claim 3 (depends on 1) The method of claim 1, wherein the PropertyGet/PropertySet commands comprise at least one of a PropertyGet command that causes the NVMeoF memory region of the remote target device to be read from and a PropertySet command that causes the NVMeoF memory region of the remote target device to be written to. ### Claim 4 (depends on 3) The method of claim 3, wherein a Data Pointer (DPTR) field is added to the PropertyGet/PropertySet commands by the host CPU. ### Claim 5 (depends on 1) The method of claim 1, wherein a Persistent Memory Region (PMR) bit is added to the PropertyGet/PropertySet submission queue entries by the host CPU. ### Claim 6 (depends on 1) The method of claim 1, wherein a Controller Memory Buffer (CMB) bit is added to the PropertyGet/PropertySet submission queue entries by the host CPU. ### Claim 7 A method of accessing a Non-Volatile Memory express (NVMe) memory region of a remote target device by a host Central Processing Unit (CPU), the method comprising: establishing, by the host CPU, a NVMeoF transport connection with the remote target device; sending, by the host CPU, a NVMeoF connect command that creates an admin submission queue in the remote target device when the NVMeoF transport connection is established with the remote target device; sending, by the host CPU, a vendor-specific command that requests access to the NVMeoF memory region of the remote target device to the remote target device when the admin submission queue is created in the remote target device; receiving, by the host CPU, an access privilege comprising at least one of a memory region address and a key of the NVMeoF memory region of the remote target device in response to the vendor-specific command; accessing, by the host CPU, the NVMeoF memory region of the remote target device by sending Remote Direct Memory Access (RDMA) write or RDMA read operations; and receiving, by the host CPU, at least one of a RDMA acknowledgement and a RDMA read response from the remote target device when accessing the NVMeoF memory region of the remote target device is completed. ### Claim 8 (depends on 7) The method of claim 7, wherein the NVMeoF memory region of the remote target device comprises at least one of a Controller Memory Buffer (CMB) and a Persistent Memory Region (PMR). ### Claim 9 A host Central Processing Unit (CPU) that accesses a Non-Volatile Memory express over Fabrics (NVMeoF) memory region of a remote target device, the host CPU comprising: a processor; and a memory communicatively coupled to the processor, wherein the memory stores processor-executable instructions, which on execution, cause the processor to: establish a NVMeoF transport connection with the remote target device; create an admin queue by sending a NVMeoF connect command to the remote target device when the NVMeoF transport connection is established with the remote target device; access the NVMeoF memory region of the remote target device by sending PropertyGet/PropertySet commands to an admin submission queue of the remote target device; receive one of (a) PropertyGet/PropertySet completion queue entries from the remote target device when accessing the NVMeoF memory region of the remote target device is completed, or (b) Remote Direct Memory Access (RDMA) write or RDMA read requests from the remote target device in response to PropertyGet/PropertySet submission queue entries; and receive completion queue entries from the remote target device when the accessing of the NVMeoF memory region of the remote target device is completed. ### Claim 10 (depends on 9) The host CPU of claim 9, wherein the NVMeoF memory region of the remote target device comprises at least one of a Controller Memory Buffer (CMB) and a Persistent Memory Region (PMR). ### Claim 11 (depends on 9) The host CPU of claim 9, wherein the PropertyGet/PropertySet commands comprise at least one of a PropertyGet command that causes the NVMeoF memory region of the remote target device to be read from and a PropertySet command that causes the NVMeoF memory region of the remote target device to be written to. ### Claim 12 (depends on 11) The host CPU of claim 11, wherein a Data Pointer (DPTR) field is added to the PropertyGet/PropertySet commands by the host CPU. ### Claim 13 (depends on 9) The host CPU of claim 9, wherein a Persistent Memory Region (PMR) bit is added to the PropertyGet/PropertySet submission queue entries by the host CPU. ### Claim 14 (depends on 9) The host CPU of claim 9, wherein a Controller Memory Buffer (CMB) bit is added to the PropertyGet/PropertySet submission queue entries by the host CPU. ### Claim at position 15 15-16. (canceled)