# US 2023/0054986 A1 · Imaging device and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0054986 A1 - Document ID: US20230054986A1 - Status: Published application - Kind: A1 - Application number: 17/904,400 - Filed: 2021-02-22 - Published: 2023-02-23 - Earliest claimed: 2020-03-06 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Seiichi YONEDA; Takayuki IKEDA; Hiroki INOUE; Yusuke NEGORO; Shunpei YAMAZAKI - Web page: https://patentgrep.com/patent/US20230054986A1 ## CPC - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H04N 25/70: SSIS architectures; Circuits associated therewith - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H10D 30/67: Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/8063: {Microlenses} - H10F 39/811: {Interconnections} - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An imaging device capable of image processing is provided. The imaging device has an image recognition function. In the imaging device, cells have a function of acquiring imaging data and a function of retaining weight data. Among the cells arranged in a matrix, some of the cells acquire imaging data and the rest of the cells retain weight data. Then, arithmetic operation is performed using the imaging data and the weight data. For example, all the imaging data can be subjected to arithmetic operation where products of the imaging data and the weight data are calculated and the sum of the calculated products is calculated. That is, product-sum operation can be performed. When an arithmetic operation result is captured by a neural network such as a convolutional neural network (CNN) or the like, the additional function can be used because image processing can be performed on the imaging data. ## Claims ### Claim 1 An imaging device comprising: a cell array where a plurality of cells are arranged in a matrix; and a logic circuit, wherein each of the plurality of cells includes a photoelectric conversion element, wherein a first cell of the plurality of cells is configured to acquire imaging data using the photoelectric conversion element, wherein a second cell of the plurality of cells is configured to retain weight data, and wherein the logic circuit is configured to perform an arithmetic operation using the imaging data acquired by the first cell and the weight data retained by the second cell. ### Claim 2 (depends on 1) The imaging device according to claim 1, wherein the logic circuit is configured to calculate a product of the imaging data and the weight data. ### Claim 3 An imaging device comprising: a cell array where a plurality of cells are arranged in a matrix; and a logic circuit, wherein each of the plurality of cells includes a photoelectric conversion element, wherein each of the plurality of cells is configured to acquire imaging data using the photoelectric conversion element, wherein each of the plurality of cells is configured to retain weight data, and wherein the logic circuit is configured to perform an arithmetic operation using first imaging data, second imaging data, first weight data, and second weight data in the case where, among the plurality of cells, a first cell acquires the first imaging data, a second cell acquires the second imaging data, a third cell retains the first weight data, and a fourth cell retains the second weight data. ### Claim 4 (depends on 3) The imaging device according to claim 3, wherein the logic circuit is configured to calculate the sum of a product of the first imaging data and the first weight data and a product of the second imaging data and the second weight data. ### Claim 5 (depends on 1) The imaging device according to claim 1, further comprising a read circuit, wherein each of the first cell and the second cell includes a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the third transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the third transistor is electrically connected to the logic circuit, wherein the other of the source and the drain of the fourth transistor is electrically connected to the read circuit, wherein the second cell is configured to retain the weight data supplied through the source and the drain of the second transistor, wherein the first cell is configured to output the imaging data from the other of the source and the drain of the third transistor or the other of the source and the drain of the fourth transistor, and wherein the second cell is configured to output the weight data from the other of the source and the drain of the third transistor. ### Claim 6 (depends on 5) The imaging device according to claim 5, wherein the first cell is configured to output the imaging data as binary data from the other of the source and the drain of the third transistor, and wherein the second cell is configured to output the weight data as binary data from the other of the source and the drain of the third transistor. ### Claim 7 (depends on 5) The imaging device according to claim 5, wherein the first transistor and the second transistor each include a metal oxide in a channel formation region, and wherein the metal oxide contains In, Zn, and M, M being Al, Ti, Ga, Ge, Sn, Y, Zr, La, Ce, Nd, or Hf. ### Claim 8 (depends on 5) The imaging device according to claim 5, further comprising a coloring layer, wherein at least one of the first to fourth transistors has a region overlapping the photoelectric conversion element and the coloring layer, and wherein the coloring layer has a function of a microlens. ### Claim 9 (depends on 8) The imaging device according to claim 8, wherein the logic circuit includes a fifth transistor, and wherein the logic circuit has a region where the fifth transistor, at least one of the first to fourth transistors, the photoelectric conversion element, and the coloring layer overlap each other. ### Claim 10 (depends on 1) The imaging device according to claim 1, further comprising a read circuit and an A/D converter circuit, wherein each of the first cell and the second cell includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor, wherein one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the third transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the one of the source and the drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to the read circuit, wherein the one of the source and the drain of the fifth transistor is electrically connected to the A/D converter circuit, wherein the A/D converter circuit is electrically connected to the logic circuit, wherein a first potential is supplied to the other of the source and the drain of the third transistor, wherein a second potential is supplied to the other of the source and the drain of the fifth transistor, wherein the second cell is configured to retain the weight data supplied through the source and the drain of the second transistor, wherein the first cell is configured to output the imaging data from the one of the source and the drain of the third transistor or the other of the source and the drain of the fourth transistor, and wherein the first cell is configured to output the weight data from the one of the source and the drain of the third transistor. ### Claim 11 (depends on 10) The imaging device according to claim 10, wherein the first transistor and the second transistor each include a metal oxide in a channel formation region, and wherein the metal oxide contains In, Zn, and M, M being Al, Ti, Ga, Ge, Sn, Y, Zr, La, Ce, Nd, or Hf. ### Claim 12 (depends on 10) The imaging device according to claim 10, further comprising a coloring layer, wherein at least one of the first to fifth transistors has a region overlapping the photoelectric conversion element and the coloring layer, and wherein the coloring layer has a function of a microlens. ### Claim 13 (depends on 12) The imaging device according to claim 12, wherein the logic circuit includes a sixth transistor, and wherein the logic circuit has a region where the sixth transistor, at least one of the first to fifth transistors, the photoelectric conversion element, and the coloring layer overlap each other. ### Claim 14 (depends on 1) An electronic device comprising: the imaging device according to claim 1, and a display portion. ### Claim 15 (depends on 3) The imaging device according to claim 3, further comprising a read circuit, wherein each of the first cell, the second cell, the third cell, and the fourth cell includes a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the third transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the third transistor is electrically connected to the logic circuit, wherein the other of the source and the drain of the fourth transistor is electrically connected to the read circuit, wherein the third cell is configured to retain the first weight data supplied through the source and the drain of the second transistor, wherein the fourth cell is configured to retain the second weight data supplied through the source and the drain of the second transistor, wherein the first cell is configured to output the first imaging data from the other of the source and the drain of the third transistor or the other of the source and the drain of the fourth transistor, wherein the second cell is configured to output the second imaging data from the other of the source and the drain of the third transistor or the other of the source and the drain of the fourth transistor, wherein the third cell is configured to output the first weight data from the other of the source and the drain of the third transistor, and wherein the fourth cell is configured to output the second weight data from the other of the source and the drain of the third transistor. ### Claim 16 (depends on 15) The imaging device according to claim 15, wherein the first cell is configured to output the first imaging data as binary data from the other of the source and the drain of the third transistor, and wherein the third cell is configured to output the first weight data as binary data from the other of the source and the drain of the third transistor. ### Claim 17 (depends on 15) The imaging device according to claim 15, further comprising a coloring layer, wherein at least one of the first to fourth transistors has a region overlapping the photoelectric conversion element and the coloring layer, and wherein the coloring layer has a function of a microlens. ### Claim 18 (depends on 3) The imaging device according to claim 3, further comprising a read circuit and an A/D converter circuit, wherein each of the first cell and the third cell includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor, wherein one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the third transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the one of the source and the drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to the read circuit, wherein the one of the source and the drain of the fifth transistor is electrically connected to the A/D converter circuit, wherein the A/D converter circuit is electrically connected to the logic circuit, wherein a first potential is supplied to the other of the source and the drain of the third transistor, wherein a second potential is supplied to the other of the source and the drain of the fifth transistor, wherein the third cell is configured to retain the first weight data supplied through the source and the drain of the second transistor, wherein the first cell is configured to output the first imaging data from the one of the source and the drain of the third transistor or the other of the source and the drain of the fourth transistor, and wherein the third cell is configured to output the first weight data from the one of the source and the drain of the third transistor. ### Claim 19 (depends on 3) An electronic device comprising: the imaging device according to claim 3, and a display portion. ### Claim 20 A semiconductor device comprising: an imaging device, the imaging device comprising: a cell array where a plurality of cells are arranged in a matrix; a logic circuit; a read circuit; and an A/D converter circuit, wherein each of the plurality of cells includes a photoelectric conversion element, wherein each of the plurality of cells is configured to acquire imaging data using the photoelectric conversion element, wherein each of the plurality of cells is configured to retain weight data, and wherein the logic circuit is configured to perform arithmetic operation using the imaging data acquired by a first cell and the weight data retained by a second cell.