# US 2023/0054512 A1 · Pin assignments based on bandwidth > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2023/0054512 A1 - Document ID: US20230054512A1 - Status: Published application - Kind: A1 - Application number: 17/795,021 - Filed: 2020-02-13 - Published: 2023-02-23 - Earliest claimed: 2020-02-13 - Assignees: Hewlett-Packard Development Company, L.P. - Applicants: Hewlett-Packard Development Company, L.P. - Inventors: Hengchang Hsu; Humberto Mario Fossati; Ting-Yu Hsu - Web page: https://patentgrep.com/patent/US20230054512A1 ## CPC - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - G06F 13/102: {where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52)} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In example implementations, an apparatus is provided. The apparatus includes a cable interface, a video interface, an integrated chip, and a controller. The cable interface is to connect a host device via a cable. The video interface is to output video signals corresponding to visual data. The controller is communicatively coupled to the cable interface, the video interface, and the integrated chip. The controller assigns pairs of pins of the cable to transmit video signals based on the bandwidth used by the video signals. The controller also causes the host device to re-assign the pairs of pins of the cable to transmit the video signals. ## Claims ### Claim 1 An apparatus: a cable interface to connect a host device via a cable; a video interface to output signals corresponding to visual data; an integrated chip to calculate bandwidth corresponding to video signals output via the video interface; and a controller communicatively coupled to the cable interface, the video interface, and the integrated chip, wherein the controller is to: assign pairs of pins of the cable to transmit the video signals based on the bandwidth corresponding to the video signals; and cause the host device to re-assign the pairs of pins of the cable to transmit the video signals. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the cable comprises a universal serial bus type-C (USB-C) cable. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the USB-C cable comprises four pairs of high-speed pins, and all four pairs of high-speed pins are assigned to transmit the video signals. ### Claim 4 (depends on 1) The apparatus of claim 1, further comprising: a 4:6 multiplexer to map the pairs of pins that are re-assigned. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the integrated chip comprises a scaler chip of a display. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the integrated chip comprises a display port multi-streaming transport hub chip of a docking station. ### Claim 7 A method, comprising: determining, by a processor, an amount of video bandwidth used by a video output; determining, by the processor, that the amount of video bandwidth is greater than an available bandwidth of a high-speed cable based on a first pair of pins of the high-speed cable that are assigned to transmit video data; assigning, by the processor, a second pair of pins of the high-speed cable to transmit the video data based on the amount of video bandwidth; causing, by the processor, a host device to assign the second pair of pins of the high-speed cable to transmit the video data; and providing, by the processor, the video data to the video output via the first pair of pins and the second pair of pins of the high-speed cable. ### Claim 8 (depends on 7) The method of claim 7, wherein the amount of video bandwidth is calculated when a display is initially connected to the video output. ### Claim 9 (depends on 8) The method of claim 8, wherein the amount of video bandwidth is calculated based on a resolution of the display. ### Claim 10 (depends on 7) The method of claim 7, wherein the causing the host device to assign the second pair of pins comprises: presenting, by the processor, a single configuration option to the host device that includes the first pair of pins and the second pair of pins of the high-speed cable assigned to transmit the video data. ### Claim 11 (depends on 7) The method of claim 7, wherein the determining the amount of video bandwidth comprises: receiving, by the processor, the amount of video bandwidth that is used from an integrated chip in communication with a display. ### Claim 12 (depends on 11) The method of claim 11, wherein the integrated chip comprises a scaler chip or a display port media stream transport hub chip. ### Claim 13 A non-transitory computer-readable storage medium encoded with instructions executable by a processor, the non-transitory computer-readable storage medium comprising: instructions to cause the processor to receive an indication that an amount of bandwidth used by a video output is greater than an available amount of bandwidth on two pairs of pins of a universal serial bus type-C (USB-C) cable; instructions to cause a host device connected via the USB-C cable to assign two additional pairs of pins of the USB cable to transmit video data; instructions to cause the host device to receive the video data over the two pairs of pins and the two additional pairs of pins of the USB-C cable; and instructions to cause the host device to transmit the video data to the video output. ### Claim 14 (depends on 13) The non-transitory computer-readable storage medium of claim 13, wherein the two additional pairs of pins of the USB-C cable comprise pin pairs (A2, A3), (B10, B11), (B2, B3), and (A10, A11). ### Claim 15 (depends on 13) The non-transitory computer-readable storage medium of claim 13, wherein the instructions to cause the processor to receive are performed each time a new display is communicatively coupled to an integrated chip that is communicatively coupled to the processor.