# US 2023/0054493 A1 · Interposer and electronic device including the same

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- Number: US 2023/0054493 A1
- Document ID: US20230054493A1
- Status: Published application
- Kind: A1
- Application number: 17/889,735
- Filed: 2022-08-17
- Published: 2023-02-23
- Earliest claimed: 2021-08-17
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Eunseok HONG
- Web page: https://patentgrep.com/patent/US20230054493A1

## CPC

- G06F 1/1686: {the I/O peripheral being an integrated camera}
- H05K 1/111: {Pads for surface mounting, e.g. lay-out}
- G06F 1/1656: {Details related to functional adaptations of the enclosure, e.g. to provide protection against EMI, shock, water, or to host detachable peripherals like a mouse or removable expansions units like PCMCIA cards, or to provide access to internal components for maintenance or to removable storage supports like CDs or DVDs, or to mechanically mount accessories (mounting of accessories to a computer display G06F1/1607; display hoods G06F1/1603; cooling arrangements for portable computers G06F1/203)}
- G06F 1/1684: {Constructional details or arrangements related to integrated I/O peripherals not covered by groups G06F1/1635 - G06F1/1675}
- H05K 1/0222: {for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence}
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H05K 1/144: {Stacked arrangements of planar printed circuit boards}
- H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
- H05K 2201/0959: Plated through-holes or plated blind vias filled with insulating material
- H05K 2201/096: Vertically aligned vias, holes or stacked vias
- H05K 2201/09609: Via grid, i.e. two-dimensional array of vias or holes in a single plane
- H05K 2201/09709: Staggered pads, lands or terminals; Parallel conductors in different planes
- H05K 2201/10378: Interposers
- H05K 2201/2018: Presence of a frame in a printed circuit or printed circuit assembly
- H05K 2203/0228: Cutting, sawing, milling or shearing
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

An example electronic device includes a housing, a first board and a second board disposed in an interior of the housing and disposed to face each other in a first direction, an interposer extending to surround an interior space between the first board and the second board, a first conductive layer disposed to face the first board and including a first conductive area, a second conductive layer disposed to face the second board and including a second conductive area, an insulation layer disposed between the first conductive layer and the second conductive layer, a first insulation part disposed between the first conductive layer and the first board and covering the first conductive area, a second insulation part disposed between the second conductive layer and the second board and covering the second conductive area, a first plating area extending from the first conductive layer to the second conductive layer, on a first side surface of the insulation layer, and a second plating area extending from the first conductive layer to the second conductive layer, on a second side surface of the insulation layer.

## Claims

### Claim 1

An electronic device comprising:
a housing;
a first board and a second board disposed in an interior of the housing and disposed to face each other in a first direction; and
an interposer extending to surround an interior space between the first board and the second board,
the interposer including:
a first conductive layer disposed to face the first board and
including a first conductive area;
a second conductive layer disposed to face the second board and
including a second conductive area;
an insulation layer disposed between the first conductive layer and
the second conductive layer;
a first insulation part disposed between the first conductive layer
and the first board and covering the first conductive area;
a second insulation part disposed between the second conductive
layer and the second board and covering the second conductive area;
a first plating area extending from the first conductive layer to the second conductive layer, on a first side surface of the insulation layer;
a second plating area extending from the first conductive layer to the second conductive layer, on a second side surface of the insulation layer;
a ground via including a first part passing through the first insulation part and connected to the first conductive area, and a second part passing through the second insulation part and connected to the second conductive area, wherein the first conductive area and the second conductive area are electrically connected to each other through the first plating area; and
a signal via passing from the first insulation part to the second insulation part.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein the interposer further includes:
a first side insulation part extending from the first insulation part to the second insulation part and covering the first plating area; and
a second side insulation part extending from the first insulation part to the second insulation part and covering the second plating area.

### Claim 3 (depends on 2)

The electronic device of claim 2, wherein the first side insulation part and the second side insulation part are integrally formed with the first insulation part and the second insulation part.

### Claim 4 (depends on 2)

The electronic device of claim 2, wherein the first side insulation part defines an outer surface of the interposer, and
wherein the second side insulation part defines an inner surface of the interposer.

### Claim 5 (depends on 1)

The electronic device of claim 1, wherein a first conductive pad electrically connected to the first board is formed on the first insulation part,
wherein the first conductive pad is connected to the first conductive area through the first part of the ground via,
wherein a second conductive pad electrically connected to the second board is formed on the second insulation part, and
wherein the second conductive pad is connected to the second conductive area through the second part of the ground via.

### Claim 6 (depends on 5)

The electronic device of claim 5, wherein the ground via electrically connects a ground of the first board and a ground of the second board,
wherein the first conductive pad at least partially contacts a ground pad of the first board, and
wherein the second conductive pad at least partially contacts a ground pad of the second board.

### Claim 7 (depends on 5)

The electronic device of claim 5, wherein a cross-sectional area of the first part of the ground via decreases in a direction toward the first conductive area, and
wherein a cross-sectional area of the second part of the ground via decreases in a direction toward the second conductive area.

### Claim 8 (depends on 1)

The electronic device of claim 1, wherein the interposer includes a first surface at least partially contacting the first board, a second surface at least partially contacting the second board, an inner surface facing the interior space, and an outer surface being opposite to the inner surface and facing an outside of the interior space,
wherein the ground via is located adjacent to any one of the inner surface or the outer surface, when the first surface is viewed from a top, and
wherein the signal via is located between the other one of the inner surface or the outer surface and the ground via, when the first surface is viewed from the top.

### Claim 9 (depends on 8)

The electronic device of claim 8, wherein the interposer further includes a second ground via,
wherein the second ground via includes a third part passing through the first insulation part and connected to a third conductive area included in the first conductive layer, and a fourth part passing through the second insulation part and connected to a fourth conductive area included in the second conductive layer, and
wherein the third conductive area and the fourth conductive area are electrically connected to each other through the second plating area.

### Claim 10 (depends on 9)

The electronic device of claim 9, wherein the second ground via is located adjacent to any one of the inner surface or the outer surface, when the first surface is viewed from the top.

### Claim 11 (depends on 1)

The electronic device of claim 1, wherein a plurality of ground vias are provided, and
wherein the signal via is disposed between any one of the plurality of ground vias and another adjacent one of the plurality of ground vias, when viewed in an extension direction of the interposer.

### Claim 12 (depends on 1)

The electronic device of claim 1, wherein the signal via includes a fifth part passing through the insulation layer, a sixth part passing through the first insulation part, and a seventh part passing through the second insulation part.

### Claim 13 (depends on 12)

The electronic device of claim 12, wherein the fifth part and the sixth part are electrically connected to a fifth conductive area included in the first conductive layer, and
wherein the fifth part and the seventh part are electrically connected to a sixth conductive area included in the second conductive layer.

### Claim 14 (depends on 12)

The electronic device of claim 12, wherein a cross-sectional area of the fifth part is larger than a cross-sectional area of the sixth part or the seventh part.

### Claim 15 (depends on 12)

The electronic device of claim 12, wherein the fifth part has a uniform cross-sectional area.

### Claim 16 (depends on 12)

The electronic device of claim 12, wherein cross-sectional areas of the sixth part and the seventh part decrease in a direction toward the insulation layer.

### Claim 17 (depends on 12)

The electronic device of claim 12, wherein a center axis of the fifth part is biased from a center axis of the sixth part or the seventh part at a specific interval.

### Claim 18 (depends on 1)

The electronic device of claim 1, wherein the interposer further includes:
a first area, in which the ground via is disposed between the first plating area and the second plating area;
a second area, in which the ground via and the signal via are disposed between the first plating area and the second plating area, and in which the ground via is adjacent to the first plating area; and
a third area, in which the ground via and the signal via are disposed between the first plating area and the second plating area, and in which the ground via is adjacent to the second plating area.

### Claim 19 (depends on 18)

The electronic device of claim 18, wherein the second area and the third area are disposed between two first areas, when viewed in an extension direction of the interposer.

### Claim 20 (depends on 18)

The electronic device of claim 18, wherein the second area and the third area are disposed alternately, when viewed in an extension direction of the interposer.