# US 2023/0054119 A1 · Method and device with defect detection

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- Number: US 2023/0054119 A1
- Document ID: US20230054119A1
- Status: Published application
- Kind: A1
- Application number: 17/886,946
- Filed: 2022-08-12
- Published: 2023-02-23
- Earliest claimed: 2021-08-17
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Priyadarshini Panemangalore PAI; Prashant Pandurang SHINDE; Shashishekara Parampalli ADIGA
- Web page: https://patentgrep.com/patent/US20230054119A1

## CPC

- G06T 7/0004: {Industrial image inspection}
- G06T 7/001: {using an image reference approach}
- G06T 7/60: Analysis of geometric attributes
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- G06T 2207/10061: from scanning electron microscope
- G06T 2207/20081: Training; Learning
- G06T 2207/20084: Artificial neural networks [ANN]
- G06T 2207/20092: Interactive image processing based on input by user
- G06T 2207/30148: Semiconductor; IC; Wafer
- G06T 2207/30168: Image quality inspection
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method and device with defect detection are included. In one general aspect, a method performed by an electronic device includes determining, by the electronic device, an operation mode among different operation modes, wherein the electronic device is configured to implement the operation modes for determining wafer defects by processing semiconductor wafer images, and determining, by the electronic device, based on an indication of the determined operation mode, whether a semiconductor image, among the semiconductor wafer images, is defective.

## Claims

### Claim 1

A method performed by an electronic device, the method comprising:
determining, by the electronic device, an operation mode among different operation modes, wherein the electronic device is configured to implement the operation modes for determining wafer defects by processing semiconductor wafer images; and
determining, by the electronic device, based on an indication of the determined operation mode, whether a semiconductor image, among the semiconductor wafer images, is defective.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
according to the indication of the operation mode, preventing another of the semiconductor wafer images from being processed to determine whether the other semiconductor wafer image is defective based on at least one of an aspect ratio of the other semiconductor wafer image, a size of the other semiconductor wafer image, or an image quality of the other semiconductor wafer image.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
according to the indication of the operation mode, preventing another of the semiconductor wafer images from being processed to determine whether the other semiconductor wafer image is defective based on one whether a region of interest (ROI) is found in the other semiconductor wafer image or whether an ROI of the other semiconductor image meets a ROI condition.

### Claim 4 (depends on 1)

The method of claim 1, wherein
the determining whether the semiconductor wafer image is defective comprises:
predicting a wafer defect in the semiconductor wafer image by using a defect prediction model; and
training the defect prediction model with training data, wherein the defect prediction model is trained to predict multiple types of wafer defects, and wherein the predicted defect is one of the types of wafer defects.

### Claim 5 (depends on 4)

The method of claim 4, wherein the training data comprises data of each of the defect types.

### Claim 6 (depends on 4)

The method of claim 4, wherein the semiconductor wafer images have a same preset size, and wherein the method further comprises, according to the indication of the operation mode:
when an image quality of one of the semiconductor wafer images is determined to not satisfy a preset image quality standard, restoring the one of the semiconductor wafer images; and
determining whether the restored one of the semiconductor wafer images is defective using the defect prediction model.

### Claim 7 (depends on 4)

The method of claim 4, wherein the semiconductor wafer images have various sizes, and wherein the method further comprises, according to the indication of the operation mode:
determining to accept one of the semiconductor wafer images based on an aspect ratio and pixel range of the one of the semiconductor wafer images;
adjusting a size of the accepted one of the semiconductor wafer images; and
determining whether the resized accepted one of the semiconductor wafer images is defective using the defect prediction model.

### Claim 8 (depends on 7)

The method of claim 7, wherein the size is determined according to a user input.

### Claim 9 (depends on 4)

The method of claim 4, wherein the semiconductor wafer images have various sizes, and wherein the method further comprises, according to the indication of the operation mode:
receiving a user-set size from a user;
determining whether one of the semiconductor wafer images satisfies an input image size requirement of the defect prediction model;
based on determining that the semiconductor wafer image does not satisfy the input image size requirement, resizing the one of the semiconductor wafer images to satisfy the input image size requirement;
in response to the determining that an ROI of the semiconductor wafer image is not in a predefined range, performing a first restoration operation on the one of the semiconductor wafer images;
based on determining that a quality of the semiconductor wafer image does not satisfy a predefined standard, performing a second restoration operation on the one of the semiconductor wafer images; and
after performing the resizing, the first restoration operation, and the second restoration operation, determining whether the one of the semiconductor wafer images is defective by using the defect prediction model.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first restoration operation comprises transforming the one of the semiconductor images such that the ROI is in the predefined range, and wherein the second restoration operation comprises increasing the quality of the semiconductor wafer image such that the quality of the semiconductor wafer image satisfies the predefined standard.

### Claim 11 (depends on 4)

The method of claim 4, wherein the defect prediction model determines whether the semiconductor wafer image is defective based on at least one of a scene graph of the semiconductor wafer image, temperature information related to the semiconductor wafer image, noise information on the semiconductor wafer image, or sensor data related to the semiconductor wafer image.

### Claim 12 (depends on 1)

The method of claim 1, further comprising determining the operation mode from among the operation modes based on evaluating:
whether sizes of the semiconductor wafer images are in a same preset size,
whether sizes of the semiconductor wafer images are different from a user-set size, and whether the semiconductor wafer images have variable sizes.

### Claim 13 (depends on 1)

The method of claim 1, further comprising receiving the semiconductor wafer images.

### Claim 14

An electronic device comprising:
a processor configured to execute instructions;
a memory storing instructions configured to, when executed by the processor, configure the processor to:
determine an operation mode among available operation modes for processing semiconductor wafer images, and
determine, based on the determined operation mode, whether a semiconductor wafer image, among the semiconductor wafer images, is defective.

### Claim 15 (depends on 14)

The electronic device of claim 14, wherein the instructions are further configured to further configure the processor to, based on the determined operation mode:
prevent determining whether one of the semiconductor wafer images is defective based on at least one of an aspect ratio of the one of the semiconductor wafer images, a size of the one of the semiconductor wafer images, a quality of the one of the semiconductor wafer images, and lack of a region of interest (ROI) of the one of the semiconductor wafer images.

### Claim 16 (depends on 14)

The electronic device of claim 14, wherein the instructions are further configured to further configure the processor to, according to the determined operation mode:
determine whether the semiconductor wafer image is defective by using a defect prediction model.

### Claim 17 (depends on 16)

The electronic device of claim 16, wherein the instructions are further configured to further configure the processor to:
train the defect prediction model to predict types of wafer defects; and
predict one of the wafer defect types for the semiconductor wafer image.

### Claim 18 (depends on 16)

The electronic device of claim 16, wherein the received semiconductor wafer images all have a same preset size, and wherein the wherein the instructions are further configured to further configure the processor to:
when a quality of one of the semiconductor wafer images does not satisfy a preset quality standard, restore the semiconductor wafer image, and
identify a defect in the restored one of the semiconductor wafer images using the defect prediction model.

### Claim 19 (depends on 16)

The electronic device of claim 16, wherein the semiconductor wafer images have various sizes, and wherein the instructions are further configured to further configure the processor to:
determine, based on an aspect ratio and pixel range of the semiconductor wafer image, whether to accept the semiconductor wafer image for performing the defect detection, and
adjust a size of the accepted semiconductor wafer image before performing the defect detection.

### Claim 20 (depends on 16)

The electronic device of claim 16, wherein the received semiconductor wafer images have various sizes, and wherein the instructions are further configured to further configure the processor to:
receive a user-set size,
determine, based on an aspect ratio and pixel range of the semiconductor wafer image, whether to accept the semiconductor wafer image for performing the defect detection, and
adjust a size of the accepted semiconductor wafer image to the user-set size before performing the defect detection.

### Claim 21 (depends on 16)

The electronic device of claim 16, wherein the received semiconductor wafer images have various sizes, and wherein the instructions are further configured to further configure the processor to:
receive a user-set size;
based on determining that the semiconductor wafer image does not satisfy an input image size requirement of the defect prediction model, adjust a size of the semiconductor wafer image such that the size of the semiconductor wafer image satisfies the input image size requirement,
based on determining that an ROI of the semiconductor wafer image is not in a predefined range, perform a first restoration operation on the semiconductor wafer image,
based on determining that a quality of the semiconductor wafer image does not satisfy a predefined standard, perform a second restoration operation on the semiconductor wafer image, and
perform the defect detection after adjusting the size and after performing the first and second restorations.

### Claim 22 (depends on 21)

The electronic device of claim 21, wherein the first restoration operation moves the ROI of the semiconductor wafer image such that the ROI of the semiconductor wafer image is in the predefined range, and wherein the second restoration operation increases the quality of the semiconductor wafer image such that the quality of the semiconductor wafer image satisfies the predefined standard.

### Claim 23 (depends on 21)

The electronic device of claim 21, wherein the defect prediction model identifies the defect in the semiconductor wafer image based on at least one of a scene graph of the semiconductor wafer image, temperature information related to the semiconductor wafer image, noise information on the semiconductor wafer image, and sensor data related to the semiconductor wafer image.

### Claim 24 (depends on 15)

The electronic device of claim 15, wherein the instructions are further configured to further configure the processor to:
determine the operation mode based on evaluating:
whether the semiconductor wafer images have a same preset size,
whether the semiconductor wafer images have sizes different from a user-set size, and
whether the semiconductor wafer images have varying sizes.
