# US 2023/0053365 A1 · Configurable logic platform with reconfigurable processing circuitry

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2023/0053365 A1
- Document ID: US20230053365A1
- Status: Published application
- Kind: A1
- Application number: 17/979,526
- Filed: 2022-11-02
- Published: 2023-02-23
- Earliest claimed: 2013-08-23
- Assignees: ThroughPuter, Inc.
- Applicants: ThroughPuter, Inc.
- Inventors: Mark Henrik Sandstrom
- Web page: https://patentgrep.com/patent/US20230053365A1

## CPC

- G06F 9/5038: {considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration (scheduling strategies G06F9/4881 and subgroups)}
- G06F 9/4881: {Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues}
- G06F 8/656: while running
- G06F 9/5027: {the resource being a machine, e.g. CPUs, Servers, Terminals}
- G06F 15/173: using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F 15/80: comprising an array of processing units with common control, e.g. single instruction multiple data processors (G06F15/82 takes precedence {; for correlation function computation G06F17/15})
- G06F 2209/483: Multiproc
- G06F 2209/5021: Priority
- H04L 47/78: Architectures of resource allocation
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

An architecture for a load-balanced groups of multi-stage manycore processors shared dynamically among a set of software applications, with capabilities for destination task defined intra-application prioritization of inter-task communications (ITC), for architecture-based ITC performance isolation between the applications, as well as for prioritizing application task instances for execution on cores of manycore processors based at least in part on which of the task instances have available for them the input data, such as ITC data, that they need for executing.

## Claims

### Claim 1

A system for processing a set of computer programs instances, with inter-task communications (ITC) performance isolation among the set of program instances, the system comprising:
a number of processing stages, at least one of which comprises multiple processing cores, with, for at least one of the cores, one of the program instances assigned for execution for a period of time; and
a group of multiplexers connecting ITC data to a given stage among the processing stages, wherein at least one of the multiplexers is specific to one given program instance among said set,
wherein the system is configured to host each task of the given program instance at different one of the processing stages, while supporting copies of software code of same given task located at more than one of the processing stages.