Avalon-to-axi4 bus conversion method
AssigneeInspur Suzhou Intelligent Technology Co., Ltd.
InventorsLei GUO, Jingdong ZHANG, Jiangwei WANG
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Abstract
Disclosed is an Avalon-to-Axi4 bus conversion method, including: in case that an Avalon bus is an Avalon_st bus, receiving Avalon_st bus data, performing a logical process on the received Avalon_st bus data, and then outputting corresponding Axi4_st bus data; and in case that the Avalon bus is an Avalon_mm bus, receiving a signal transmitted by each channel of the Avalon_mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.
Claims16
An Avalon-to-Axi4 bus conversion method, characterized by comprising:
- in case that an Avalon bus is an Avalon_st bus, receiving Avalon_st bus data, performing a logical process on the received Avalon_st bus data, and then outputting corresponding Axi4_st bus data;
- and
- in case that the Avalon bus is an Avalon_mm bus, receiving a signal transmitted by each channel of the Avalon_mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.
-8. (canceled)
An Avalon-to-Axi4 bus conversion device, characterized by comprising:
- a memory, configured to store a computer program;
- and
- a processor, configured to execute the computer program to implement any steps of an Avalon-to-Axi4 bus conversion method, wherein the Avalon-to-Axi4 bus conversion method comprises:
- in case that an Avalon bus is an Avalon st bus, receiving Avalon st bus data, performing a logical process on the received Avalon st bus data, and then outputting corresponding Axi4 st bus data;
- and
- in case that the Avalon bus is an Avalon mm bus, receiving a signal transmitted by each channel of the Avalon mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.
A computer-readable storage medium, characterized by having a computer program stored thereon which, when executed by a processor, implements any steps of an Avalon-to-Axi4 bus conversion method, wherein the Avalon-to-Axi4 bus conversion method comprises:
- in case that an Avalon bus is an Avalon st bus, receiving Avalon st bus data, performing a logical process on the received Avalon st bus data, and then outputting corresponding Axi4 st bus data;
- and
- in case that the Avalon bus is an Avalon mm bus, receiving a signal transmitted by each channel of the Avalon mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus.
Dependencies are inferred from the claim text.