Split inverter, capacitor digital-to-analog converter and analog-to-digital converter of successive approximation register type including same

An analog-to-digital converter of successive approximation register (SAR) type configured to perform a binary search conversion to sequentially determine from a most significant bit to a least significant bit of a plurality of bits of a digital output signal corresponding to an analog input signal, comprising:

• a comparator configured to generate a comparison signal by comparing comparison input voltages of comparison input terminals;
• a SAR logic circuit configured to generate a plurality of control signals based on the comparison signal to control the binary search conversion;
• and
• a capacitor digital-to-analog converter including a plurality of drivers configured to control the comparison input voltages based on a first reference voltage, a second reference voltage lower than the first reference voltage and the plurality of control signals, each driver of the plurality of drivers including a capacitor and a split inverter, a first capacitor node of the capacitor being connected to one of the comparison input terminals, the split inverter including a pull-up unit connected to the first reference voltage and a pull-down unit connected to the second reference voltage, the split inverter driving a second capacitor node of the capacitor by selectively turning on one of the pull-up unit and the pull-down unit, a first one of the pull-up unit and the pull-down unit including a full transistor, a second one of the pull-up unit and the pull-down unit including a first split transistor and a second split transistor.