Pseudo-random binary sequences (prbs) generator for performing on-chip testing and a method thereof

A method (300) for generating an output pseudo-random binary sequence (PRBS) for performing on-chip testing by using pseudo-random binary sequence (PRBS) generator (200), comprising:

• providing (301) a plurality of lanes, wherein each lane comprises a latch group capable of receiving clock signals, wherein a number of latches in each latch group is based on the output sequence to be generated for performing the on-chip testing;
• and
• connecting (303) each latch group having at least one of a flip flop and a latch with a plurality of logic gates in such a manner that an output, generated by the at least one of the flip-flop and the latch of each latch group, is provided as an input to the plurality of logic gates for generating the output sequence required for performing the on-chip testing.