Shift Register, Drive Method, Drive Circuit, Display Substrate, and Device

A shift register, comprising:

• an input unit, a first control unit, a second control unit, an output unit, and a voltage stabilizing unit,
• wherein the input unit is respectively connected to a signal input end, a first power supply end, a first clock signal end, a first node, and a second node, and is configured to provide a signal of the signal input end to the first node and provide a signal of the first power supply end to the second node under control of the first clock signal end;
• the first control unit is respectively connected to the first node, the second node, a fourth node, a second power supply end, and a second clock signal end, and is configured to control a signal of the fourth node according to the signals of the first node and the second node;
• the second control unit is respectively connected to the first node, the second node, the second power supply end, and the second clock signal end, and is configured to provide a signal of the second power supply end to the first node under control of the second node and the second clock signal end;
• the output unit is respectively connected to the fourth node, a fifth node, the first power supply end, the second power supply end, and an output end, and is configured to provide the signal of the second power supply end or the first power supply end to the output end under control of the fourth node and the fifth node;
• and
• the voltage stabilizing unit is respectively connected to the first node, the fifth node, the output end, and the first power supply end, and is configured to keep the signal of the output end stable when the output unit provides the signal of the first power supply end to the output end.