Frequency-selective common-mode control and output stage biasing in an operational amplifier for a class-d amplifier loop filter

A fully-differential amplifier that implements an integrator for providing an output to a switched-power stage of a switched-power amplifier, the differential amplifier comprising:

• a first pull-up transistor that couples a first output of the fully-differential amplifier to a positive supply voltage;
• a first pull-down transistor that couples the first output of the fully-differential amplifier to a negative supply voltage;
• a second pull-up transistor that couples a second output of the fully-differential amplifier to the positive supply voltage;
• a second pull-down transistor that couples the second output of the fully-differential amplifier to the negative supply voltage;
• a first capacitor that couples a gate of the first pull-down transistor and a gate of the first pull-up transistor;
• a second capacitor that couples a gate of the second pull-down transistor and a gate of the second pull-up transistor;
• and
• a bias input for controlling a direct-current (DC) bias voltage of the gate of the first pull-up transistor and the gate of the second pull-up transistor, whereby the first output and the second output of the fully-differential amplifier stage operates with class A bias at DC and with class AB bias at high frequencies, wherein the bias input is coupled to the gate of the first pull-up transistor by a first resistor and the gate of the second pull-up transistor by a second resistor, and wherein a first time constant of the first resistor and the first capacitor and a second time constant of the second resistor and the second capacitor are equal and provide a corner frequency at the gate of the first pull-down transistor and the gate of the second pull-down transistor that falls between a switching frequency of the switched-power stage and an upper bound of a signal frequency range reproduced by the switched-power amplifier in response to signals provided at an input of the integrator.

A method of controlling an output common-mode voltage and an input common-mode voltage of an integrator providing an output to a switched-power stage of a switched-power amplifier, the method comprising:

• providing one or more fully-differential amplifier stages with a common-mode control input;
• controlling low-frequency drift of the common-mode voltage of the output of the fully-differential amplifier stages with the low-frequency feedback control path coupled between an output of the fully-differential amplifier stages and the common-mode control input;
• and
• controlling high-frequency ripple of a common-mode voltage of a pair of inputs of the one or more fully-differential amplifier stages with a high-frequency feed-forward path coupled between the pair of inputs of the one or more fully-differential amplifier stages and the common-mode control input.

A method of conserving energy in a differential amplifier that implements an integrator for providing an output to a switched-power stage of a switched-power amplifier, the method comprising:

• coupling a first output of the fully-differential amplifier to a positive supply voltage with a first pull-up transistor;
• coupling the first output of the fully-differential amplifier to a negative supply voltage with a first pull-down transistor;
• coupling a second output of the fully-differential amplifier to the positive supply voltage with a second pull-up transistor;
• coupling the second output of the fully-differential amplifier to the negative supply voltage with a second pull-down transistor;
• coupling a gate of the first pull-down transistor and a gate of the first pull-up transistor with a first capacitor;
• coupling a gate of the second pull-down transistor and a gate of the second pull-up transistor with a second capacitor;
• and
• controlling a direct-current (DC) bias voltage of the gate of the first pull-up transistor and the gate of the second pull-up transistor in response to a bias input that is coupled to the gate of the first pull-up transistor by a first resistor and the gate of the second pull-up transistor by a second resistor, whereby the first output and the second output of the fully-differential amplifier stage operates with class A bias at DC and with class AB bias at high frequencies, and wherein a first time constant of the first resistor and the first capacitor and a second time constant of the second resistor and the second capacitor are equal and provide a corner frequency at the gate of the first pull-down transistor and the gate of the second pull-down transistor that falls between a switching frequency of the switched-power stage and an upper bound of a signal frequency range reproduced by the switched-power amplifier in response to signals provided at an input of the integrator.

A fully-differential amplifier that implements an integrator for providing an output to a switched-power stage of a switched-power amplifier, the differential amplifier comprising:

• a pair of fully-differential amplifier stages connected in a cascade, wherein a first one of the pair of fully-differential amplifier stages has a common-mode control input, and wherein a second one of the pair of fully-differential amplifier stages comprises a first pull-up transistor that couples a first output of the fully-differential amplifier to a positive supply voltage, a first pull-down transistor that couples the first output of the fully-differential amplifier to a negative supply voltage, a second pull-up transistor that couples a second output of the fully-differential amplifier to the positive supply voltage, a second pull-down transistor that couples the second output of the fully-differential amplifier to the negative supply voltage, a first capacitor that couples a gate of the first pull-down transistor and a gate of the first pull-up transistor, a second capacitor that couples a gate of the second pull-down transistor and a gate of the second pull-up transistor, and a bias input for controlling a direct-current (DC) bias voltage of the gate of the first pull-up transistor and the gate of the second pull-up transistor, whereby the first output and the second output of the fully-differential amplifier stage operates with class A bias at DC and with class AB bias at high frequencies, wherein the bias input is coupled to the gate of the first pull-up transistor by a first resistor and the gate of the second pull-up transistor by a second resistor, and wherein a first time constant of the first resistor and the first capacitor and a second time constant of the second resistor and the second capacitor are equal and provide a corner frequency at the gate of the first pull-down transistor and the gate of the second pull-down transistor that falls between a switching frequency of the switched-power stage and an upper bound of a signal frequency range reproduced by the switched-power amplifier in response to signals provided at an input of the integrator;
• a low-frequency feedback control path coupled between an output of the fully-differential amplifier stages and the common-mode control input, wherein the low-frequency feedback path controls low-frequency drift of the common-mode voltage of the output of the fully-differential amplifier stages;
• and
• a high-frequency feed-forward control path coupled between a pair of inputs of the one or more fully-differential amplifier stages and the common-mode control input, wherein the high-frequency path controls high-frequency ripple of a common-mode voltage of a pair of inputs of the one or more fully-differential amplifier stages.