# US 2022/0285609 A1 · Memory device

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- Number: US 2022/0285609 A1
- Document ID: US20220285609A1
- Status: Published application
- Kind: A1
- Application number: 17/355,146
- Filed: 2021-06-22
- Published: 2022-09-08
- Earliest claimed: 2021-03-05
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Yen-Lin Huang; Ming-Yuan Song; Chien-Min Lee; Shy-Jay Lin
- Web page: https://patentgrep.com/patent/US20220285609A1

## CPC

- H10N 52/80: Constructional details
- G06F 7/58: Random or pseudo-random number generators
- G09C 1/00: Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00)
- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/10: Magnetoresistive devices
- H10N 50/85: Materials of the active region
- H10N 52/00: Hall-effect devices (integrated devices or assemblies of multiple devices H10N59/00)
- H10N 52/01: Manufacture or treatment
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G09C: CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A memory device is provided. The memory device includes a substrate, a spin-orbit torque layer and a magnetic tunneling junction (MTJ). The MTJ stacks with the spin-orbit torque layer over the substrate and includes a synthetic free layer, a barrier layer and a reference layer. The synthetic free layer includes a synthetic antiferromagnetic structure, a first spacer layer and a free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the free layer. The barrier layer is disposed beside the synthetic free layer. The reference layer is disposed beside the barrier layer.

## Claims

### Claim 1

A memory device, comprising:
a substrate;
a spin-orbit torque layer; and
a magnetic tunneling junction (MTJ) stacking with the spin-orbit torque layer over the substrate and comprising:
a synthetic free layer comprising a synthetic antiferromagnetic structure, a first spacer layer and a free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the free layer, and the synthetic antiferromagnetic structure is configured to alter a magnetization direction of the free layer;
a barrier layer disposed beside the synthetic free layer; and
a reference layer disposed beside the barrier layer.

### Claim 2 (depends on 1)

The memory device according to claim 1, wherein the synthetic antiferromagnetic structure comprises:
a first ferromagnetic layer with a first magnetization direction;
a second ferromagnetic layer with a second magnetization direction different from the first magnetization direction; and
a second spacer layer between the first ferromagnetic layer and the second ferromagnetic layer.

### Claim 3 (depends on 2)

The memory device according to claim 2, wherein the synthetic free layer further comprises:
a superparamagnetic layer between the spin-orbit torque layer and the synthetic antiferromagnetic structure; and
a third spacer layer between the superparamagnetic layer and the synthetic antiferromagnetic structure.

### Claim 4 (depends on 2)

The memory device according to claim 2, wherein each of the first ferromagnetic layer and the second ferromagnetic layer comprises a cobalt-chromium alloy, a cobalt-iron-nickel alloy, or a cobalt-iron alloy.

### Claim 5 (depends on 3)

The memory device according to claim 3, wherein each of the first spacer layer, the second spacer layer and the third spacer layer comprises Ru, W, V or Ti, and a thickness of each of the first spacer layer, the second spacer layer and the third spacer layer ranges from 0.2 nm to 1.5 nm.

### Claim 6 (depends on 3)

The memory device according to claim 3, wherein the superparamagnetic layer comprises a tungsten-cobalt alloy.

### Claim 7 (depends on 1)

The memory device according to claim 1, further comprising a diffusion barrier lying between the MTJ and the spin-orbit torque layer, wherein the diffusion barrier is formed of a non-magnetic conductive material.

### Claim 8

A memory device, comprising:
a write transistor and a read transistor, formed on a surface region of a substrate;
a spin-orbit torque layer, lying over the write transistor and the read transistor, and electrically connected with a terminal of the write transistor and a terminal of the read transistor;
a MTJ, standing on the spin-orbit torque layer and electrically coupled with the spin-orbit torque layer by a first terminal of the MTJ, wherein the MTJ comprises:
a synthetic free layer comprising a synthetic antiferromagnetic structure, a free layer and a first exchange coupling metal layer between the synthetic antiferromagnetic structure and the free layer, wherein the synthetic antiferromagnetic structure is closer to the spin-orbit torque layer than the free layer;
a barrier layer disposed over the synthetic free layer; and
a reference layer disposed over the barrier layer; and
a bit line, electrically coupled with a second terminal of the MTJ.

### Claim 9 (depends on 8)

The memory device according to claim 8, wherein
the terminal of the write transistor is one of source and drain terminals of the write transistor, the terminal of the read transistor is one of source and drain terminals of the read transistor; and
the synthetic antiferromagnetic structure comprises:
a first ferromagnetic layer with a first magnetization direction;
a second ferromagnetic layer with a second magnetization direction different from the first magnetization direction; and
a second exchange coupling metal layer between the first ferromagnetic layer and the second ferromagnetic layer.

### Claim 10 (depends on 9)

The memory device according to claim 9, wherein each of the first ferromagnetic layer and the second ferromagnetic layer comprises a cobalt-chromium alloy or a cobalt-iron-nickel alloy, the cobalt-chromium alloy is represented as Co1-xCrx, wherein 0.05<x<40.2, and the cobalt-iron-nickel alloy is represented as Cox—Fey—Ni, wherein x<0.5, y<0.3, z>0.5.

### Claim 11 (depends on 9)

The memory device according to claim 9, wherein each of the first ferromagnetic layer and the second ferromagnetic layer comprises two ferromagnetic sub-layers and a spacer layer sandwiched between the two ferromagnetic sub-layers, each of the two ferromagnetic sub-layers comprises a cobalt-iron alloy, the cobalt-iron alloy is represented as CoxFey, wherein 0.1<x<0.4, 0.5<y<0.8, x+y=1, the spacer layer comprises Ru, W, V, Ti, Cr, Cu, Al or Ni.

### Claim 12 (depends on 9)

The memory device according to claim 9, wherein the synthetic free layer further comprises:
a superparamagnetic layer between the spin-orbit torque layer and the synthetic antiferromagnetic structure; and
a nonmagnetic spacer layer between the superparamagnetic layer and the synthetic antiferromagnetic structure, wherein the superparamagnetic layer comprises a tungsten-cobalt alloy, the tungsten-cobalt alloy is represented as W1-xCox, wherein 0.01<x<0.5.

### Claim 13 (depends on 8)

The memory device according to claim 8, further comprising a passivation layer, conformally covering a sidewall and a top surface of the MTJ and a top surface of the spin-orbit torque layer.

### Claim 14 (depends on 8)

The memory device according to claim 8, further comprising:
a first source line, lying over the write transistor and the read transistor, and electrically coupled with the other source/drain terminal of the write transistor; and
a second source line, lying over the write transistor and the read transistor, and electrically coupled with the other source/drain terminal of the read transistor.

### Claim 15 (depends on 8)

The memory device according to claim 8, further comprising a dummy word line lying on the substrate and located between the write transistor and the read transistor.

### Claim 16

A memory device, comprising:
a read transistor, formed on a surface region of a substrate, and comprising a read word line extending on the substrate;
a bit line, lying over the read word line and coupled with a first terminal of the read transistor;
a spin-orbit torque layer, disposed over the read transistor;
a MTJ, disposed under the spin-orbit torque layer, wherein the MTJ is electrically coupled with a second terminal of the read transistor by a first terminal of the MTJ and electrically coupled with the spin-orbit torque layer by a second terminal of the MTJ, and the MTJ comprises:
a synthetic free layer comprising a synthetic antiferromagnetic structure, a free layer and a first exchange coupling metal layer between the synthetic antiferromagnetic structure and the free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the first exchange coupling metal layer;
a barrier layer disposed under the synthetic free layer; and
a reference layer disposed under the barrier layer;
a selector, disposed over the spin-orbit torque layer and electrically coupled with the spin-orbit torque layer by a first terminal of the selector; and
a write word line, lying over the selector and electrically coupled with a second terminal of the selector.

### Claim 17 (depends on 16)

The memory device according to claim 16, wherein
the first terminal of the read transistor is one of source and drain terminals of the read transistor, the second terminal of the read transistor is the other of the source and drain terminals of the read transistor; and
the synthetic antiferromagnetic structure comprises:
a first ferromagnetic layer with a first magnetization direction;
a second ferromagnetic layer with a second magnetization direction different from the first magnetization direction; and
a second exchange coupling metal layer between the first ferromagnetic layer and the second ferromagnetic layer.

### Claim 18 (depends on 17)

The memory device according to claim 17, wherein each of the first ferromagnetic layer and the second ferromagnetic layer comprises a single layer, the single layer comprises a cobalt-chromium alloy or a cobalt-iron-nickel alloy, the cobalt-chromium alloy is represented as Co1-xCrx, wherein 0.05<x<0.2, and the cobalt-iron-nickel alloy is represented as Cox—Fey—Niz, wherein x<0.5, y<0.3, z>0.5.

### Claim 19 (depends on 17)

The memory device according to claim 17, wherein each of the first ferromagnetic layer and the second ferromagnetic layer comprises a multilayer structure, the multilayer structure comprises a cobalt-iron alloy, the cobalt-iron alloy is represented as CoxFey, wherein 0.1<x<0.4, 0.5<y<0.8, x+y=1, the spacer layer comprises Ru, W, V, Ti, Cr, Cu, Al or Ni.

### Claim 20 (depends on 16)

The memory device according to claim 16, wherein the synthetic free layer further comprises:
a superparamagnetic layer between the spin-orbit torque layer and the synthetic antiferromagnetic structure; and
a nonmagnetic spacer layer between the superparamagnetic layer and the synthetic antiferromagnetic structure, wherein the superparamagnetic layer comprises a tungsten-cobalt alloy, the tungsten-cobalt alloy is represented as W1-xCox, wherein 0.01<x<0.5.