# US 2022/0285437 A1 · Layout pattern for magnetoresistive random access memory

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- Number: US 2022/0285437 A1
- Document ID: US20220285437A1
- Status: Published application
- Kind: A1
- Application number: 17/750,386
- Filed: 2022-05-22
- Published: 2022-09-08
- Earliest claimed: 2020-01-16
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Ya-Huei Tsai; Rai-Min Huang; Yu-Ping Wang; Hung-Yueh Chen
- Web page: https://patentgrep.com/patent/US20220285437A1

## CPC

- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/80: Constructional details
- H10N 50/85: Materials of the active region
- H10W 20/43: Layouts of interconnections
- G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell}
- H01F 10/3254: {the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]}
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES

## Abstract

A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.

## Claims

### Claim 1

A layout pattern for magnetoresistive random access memory (MRAM), comprising:
a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region;
a first gate pattern extending along a first direction from the first active region to the second active region;
a second gate pattern extending along the first direction from the first active region to the second active region;
a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region; and
a second MTJ between the first gate pattern and the second gate pattern in the first active region, wherein top surfaces of the first MTJ and the second MTJ are coplanar.

### Claim 2 (depends on 1)

The layout pattern for MRAM of claim 1, further comprising a metal interconnection on a same level as the first MTJ in the word line connecting region.

### Claim 3 (depends on 1)

The layout pattern for MRAM of claim 1, further comprising:
a first diffusion region extending along a second direction and adjacent to the first gate pattern and the second gate pattern in the word line connecting region; and
a second diffusion region extending along a second direction and adjacent to the first gate pattern and the second gate pattern in the word line connecting region.

### Claim 4 (depends on 3)

The layout pattern for MRAM of claim 3, wherein the first MTJ is between the first diffusion region and the second diffusion region.

### Claim 5 (depends on 3)

The layout pattern for MRAM of claim 3, wherein the first direction is orthogonal to the second direction.

### Claim 6 (depends on 1)

The layout pattern for MRAM of claim 1, further comprising a third MTJ between the first gate pattern and the second gate pattern in the second active region.

### Claim 7 (depends on 6)

The layout pattern for MRAM of claim 6, further comprising:
a first metal interconnection directly under the second MTJ;
a second metal interconnection directly under the third MTJ;
a first inter-metal dielectric (IMD) layer around the first MTJ, the second MTJ, and the third MTJ;
a second IMD layer around the first metal interconnection and the second metal interconnection; and
a stop layer under the second IMD layer.

### Claim 8 (depends on 7)

The layout pattern for MRAM of claim 7, wherein the second IMD layer is under the first IMD layer.

### Claim 9 (depends on 7)

The layout pattern for MRAM of claim 7, wherein a top surface of the second IMD layer comprises a curve.

### Claim 10 (depends on 7)

The layout pattern for MRAM of claim 7, wherein bottom surfaces of the stop layer and the first metal interconnection are coplanar.

### Claim 11 (depends on 1)

The layout pattern for MRAM of claim 1, wherein bottom surfaces of the first MTJ and the second MTJ are coplanar.